Add new corner-based lib files to unit tests.

This commit is contained in:
mguthaus 2018-02-11 16:35:10 -08:00
parent 4dd075c7b7
commit f690532563
9 changed files with 32 additions and 26 deletions

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@ -22,8 +22,8 @@ class lib_test(openram_test):
debug.info(1, "Testing timing for sample 2 bit, 16 words SRAM with 1 bank")
s = sram.sram(word_size=2,
num_words=OPTS.num_words,
num_banks=OPTS.num_banks,
num_words=16,
num_banks=1,
name="sram_2_16_1_{0}".format(OPTS.tech_name))
OPTS.check_lvsdrc = True

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@ -5,7 +5,7 @@ Check the .lib file for an SRAM with pruning
import unittest
from testutils import header,openram_test
import sys,os
import sys,os,re
sys.path.append(os.path.join(sys.path[0],".."))
import globals
from globals import OPTS
@ -31,21 +31,27 @@ class lib_test(openram_test):
debug.info(1, "Testing timing for sample 2 bit, 16 words SRAM with 1 bank")
s = sram.sram(word_size=2,
num_words=OPTS.num_words,
num_banks=OPTS.num_banks,
num_words=16,
num_banks=1,
name="sram_2_16_1_{0}".format(OPTS.tech_name))
OPTS.check_lvsdrc = True
tempspice = OPTS.openram_temp + "temp.sp"
s.sp_write(tempspice)
filename = s.name + "_pruned.lib"
libname = OPTS.openram_temp + filename
lib.lib(libname=libname,sram=s,sp_file=tempspice,use_model=False)
# let's diff the result with a golden model
golden = "{0}/golden/{1}".format(os.path.dirname(os.path.realpath(__file__)),filename)
self.isapproxdiff(libname,golden,0.30)
lib.lib(out_dir=OPTS.openram_temp, sram=s, sp_file=tempspice, use_model=False)
# get all of the .lib files generated
files = os.listdir(OPTS.openram_temp)
nametest = re.compile("\.lib$", re.IGNORECASE)
lib_files = filter(nametest.search, files)
# and compare them with the golden model
for filename in lib_files:
newname = filename.replace(".lib","_pruned.lib")
libname = "{0}/{1}".format(OPTS.openram_temp,filename)
golden = "{0}/golden/{1}".format(os.path.dirname(os.path.realpath(__file__)),newname)
self.isapproxdiff(libname,golden,0.15)
OPTS.analytical_delay = True
reload(characterizer)

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@ -31,8 +31,8 @@ class lib_test(openram_test):
debug.info(1, "Testing timing for sample 2 bit, 16 words SRAM with 1 bank")
s = sram.sram(word_size=2,
num_words=OPTS.num_words,
num_banks=OPTS.num_banks,
num_words=16,
num_banks=1,
name="sram_2_16_1_{0}".format(OPTS.tech_name))
OPTS.check_lvsdrc = True

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@ -1,4 +1,4 @@
library (sram_2_16_1_freepdk45_lib){
library (sram_2_16_1_freepdk45_TT_10V_25C_lib){
delay_model : "table_lookup";
time_unit : "1ns" ;
voltage_unit : "1v" ;
@ -9,7 +9,7 @@ library (sram_2_16_1_freepdk45_lib){
pulling_resistance_unit :"1kohm" ;
operating_conditions(TT){
voltage : 1.0 ;
temperature : 25.000 ;
temperature : 25;
}
input_threshold_pct_fall : 50.0 ;

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@ -1,4 +1,4 @@
library (sram_2_16_1_freepdk45_lib){
library (sram_2_16_1_freepdk45_TT_10V_25C_lib){
delay_model : "table_lookup";
time_unit : "1ns" ;
voltage_unit : "1v" ;
@ -9,7 +9,7 @@ library (sram_2_16_1_freepdk45_lib){
pulling_resistance_unit :"1kohm" ;
operating_conditions(TT){
voltage : 1.0 ;
temperature : 25.000 ;
temperature : 25;
}
input_threshold_pct_fall : 50.0 ;

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@ -1,4 +1,4 @@
library (sram_2_16_1_freepdk45_lib){
library (sram_2_16_1_freepdk45_TT_10V_25C_lib){
delay_model : "table_lookup";
time_unit : "1ns" ;
voltage_unit : "1v" ;
@ -9,7 +9,7 @@ library (sram_2_16_1_freepdk45_lib){
pulling_resistance_unit :"1kohm" ;
operating_conditions(TT){
voltage : 1.0 ;
temperature : 25.000 ;
temperature : 25;
}
input_threshold_pct_fall : 50.0 ;

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@ -1,4 +1,4 @@
library (sram_2_16_1_scn3me_subm_lib){
library (sram_2_16_1_scn3me_subm_TT_50V_25C_lib){
delay_model : "table_lookup";
time_unit : "1ns" ;
voltage_unit : "1v" ;
@ -9,7 +9,7 @@ library (sram_2_16_1_scn3me_subm_lib){
pulling_resistance_unit :"1kohm" ;
operating_conditions(TT){
voltage : 5.0 ;
temperature : 25.000 ;
temperature : 25;
}
input_threshold_pct_fall : 50.0 ;

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@ -1,4 +1,4 @@
library (sram_2_16_1_scn3me_subm_lib){
library (sram_2_16_1_scn3me_subm_TT_50V_25C_lib){
delay_model : "table_lookup";
time_unit : "1ns" ;
voltage_unit : "1v" ;
@ -9,7 +9,7 @@ library (sram_2_16_1_scn3me_subm_lib){
pulling_resistance_unit :"1kohm" ;
operating_conditions(TT){
voltage : 5.0 ;
temperature : 25.000 ;
temperature : 25;
}
input_threshold_pct_fall : 50.0 ;

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@ -1,4 +1,4 @@
library (sram_2_16_1_scn3me_subm_lib){
library (sram_2_16_1_scn3me_subm_TT_50V_25C_lib){
delay_model : "table_lookup";
time_unit : "1ns" ;
voltage_unit : "1v" ;
@ -9,7 +9,7 @@ library (sram_2_16_1_scn3me_subm_lib){
pulling_resistance_unit :"1kohm" ;
operating_conditions(TT){
voltage : 5.0 ;
temperature : 25.000 ;
temperature : 25;
}
input_threshold_pct_fall : 50.0 ;