mirror of https://github.com/VLSIDA/OpenRAM.git
PEP8 formatting
This commit is contained in:
parent
dfbf6fe45c
commit
f6135f3471
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@ -7,13 +7,12 @@
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#
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#
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import debug
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import debug
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import design
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import design
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from tech import drc
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from tech import cell_properties as props
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from tech import cell_properties as props
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from math import log
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from vector import vector
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from vector import vector
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from globals import OPTS
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from globals import OPTS
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from sram_factory import factory
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from sram_factory import factory
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class dff_buf_array(design.design):
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class dff_buf_array(design.design):
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"""
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"""
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This is a simple row (or multiple rows) of flops.
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This is a simple row (or multiple rows) of flops.
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@ -56,11 +55,11 @@ class dff_buf_array(design.design):
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def add_pins(self):
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def add_pins(self):
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for row in range(self.rows):
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for row in range(self.rows):
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for col in range(self.columns):
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for col in range(self.columns):
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self.add_pin(self.get_din_name(row,col), "INPUT")
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self.add_pin(self.get_din_name(row, col), "INPUT")
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for row in range(self.rows):
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for row in range(self.rows):
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for col in range(self.columns):
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for col in range(self.columns):
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self.add_pin(self.get_dout_name(row,col), "OUTPUT")
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self.add_pin(self.get_dout_name(row, col), "OUTPUT")
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self.add_pin(self.get_dout_bar_name(row,col), "OUTPUT")
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self.add_pin(self.get_dout_bar_name(row, col), "OUTPUT")
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self.add_pin("clk", "INPUT")
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self.add_pin("clk", "INPUT")
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self.add_pin("vdd", "POWER")
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self.add_pin("vdd", "POWER")
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self.add_pin("gnd", "GROUND")
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self.add_pin("gnd", "GROUND")
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@ -75,17 +74,16 @@ class dff_buf_array(design.design):
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inv2_size=self.inv2_size)
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inv2_size=self.inv2_size)
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self.add_mod(self.dff)
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self.add_mod(self.dff)
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def create_dff_array(self):
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def create_dff_array(self):
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self.dff_insts={}
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self.dff_insts={}
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for row in range(self.rows):
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for row in range(self.rows):
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for col in range(self.columns):
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for col in range(self.columns):
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name = "dff_r{0}_c{1}".format(row,col)
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name = "dff_r{0}_c{1}".format(row, col)
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self.dff_insts[row,col]=self.add_inst(name=name,
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self.dff_insts[row, col]=self.add_inst(name=name,
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mod=self.dff)
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mod=self.dff)
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inst_ports = [self.get_din_name(row,col),
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inst_ports = [self.get_din_name(row, col),
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self.get_dout_name(row,col),
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self.get_dout_name(row, col),
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self.get_dout_bar_name(row,col),
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self.get_dout_bar_name(row, col),
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"clk",
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"clk",
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"vdd",
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"vdd",
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"gnd"]
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"gnd"]
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@ -104,14 +102,14 @@ class dff_buf_array(design.design):
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for row in range(self.rows):
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for row in range(self.rows):
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for col in range(self.columns):
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for col in range(self.columns):
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name = "Xdff_r{0}_c{1}".format(row,col)
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name = "Xdff_r{0}_c{1}".format(row, col)
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if (row % 2 == 0):
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if (row % 2 == 0):
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base = vector(col*dff_pitch,row*self.dff.height)
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base = vector(col * dff_pitch, row * self.dff.height)
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mirror = "R0"
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mirror = "R0"
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else:
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else:
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base = vector(col*dff_pitch,(row+1)*self.dff.height)
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base = vector(col * dff_pitch, (row + 1) * self.dff.height)
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mirror = "MX"
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mirror = "MX"
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self.dff_insts[row,col].place(offset=base,
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self.dff_insts[row, col].place(offset=base,
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mirror=mirror)
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mirror=mirror)
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def get_din_name(self, row, col):
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def get_din_name(self, row, col):
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@ -120,7 +118,7 @@ class dff_buf_array(design.design):
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elif self.rows == 1:
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elif self.rows == 1:
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din_name = "din_{0}".format(col)
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din_name = "din_{0}".format(col)
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else:
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else:
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din_name = "din_{0}_{1}".format(row,col)
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din_name = "din_{0}_{1}".format(row, col)
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return din_name
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return din_name
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@ -130,7 +128,7 @@ class dff_buf_array(design.design):
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elif self.rows == 1:
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elif self.rows == 1:
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dout_name = "dout_{0}".format(col)
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dout_name = "dout_{0}".format(col)
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else:
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else:
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dout_name = "dout_{0}_{1}".format(row,col)
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dout_name = "dout_{0}_{1}".format(row, col)
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return dout_name
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return dout_name
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@ -140,7 +138,7 @@ class dff_buf_array(design.design):
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elif self.rows == 1:
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elif self.rows == 1:
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dout_bar_name = "dout_bar_{0}".format(col)
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dout_bar_name = "dout_bar_{0}".format(col)
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else:
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else:
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dout_bar_name = "dout_bar_{0}_{1}".format(row,col)
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dout_bar_name = "dout_bar_{0}_{1}".format(row, col)
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return dout_bar_name
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return dout_bar_name
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@ -148,67 +146,65 @@ class dff_buf_array(design.design):
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for row in range(self.rows):
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for row in range(self.rows):
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for col in range(self.columns):
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for col in range(self.columns):
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# Continous vdd rail along with label.
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# Continous vdd rail along with label.
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vdd_pin=self.dff_insts[row,col].get_pin("vdd")
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vdd_pin=self.dff_insts[row, col].get_pin("vdd")
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self.add_power_pin("vdd", vdd_pin.lc())
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self.add_power_pin("vdd", vdd_pin.lc())
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# Continous gnd rail along with label.
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# Continous gnd rail along with label.
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gnd_pin=self.dff_insts[row,col].get_pin("gnd")
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gnd_pin=self.dff_insts[row, col].get_pin("gnd")
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self.add_power_pin("gnd", gnd_pin.lc())
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self.add_power_pin("gnd", gnd_pin.lc())
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for row in range(self.rows):
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for row in range(self.rows):
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for col in range(self.columns):
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for col in range(self.columns):
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din_pin = self.dff_insts[row,col].get_pin("D")
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din_pin = self.dff_insts[row, col].get_pin("D")
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debug.check(din_pin.layer=="m2","DFF D pin not on metal2")
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debug.check(din_pin.layer=="m2", "DFF D pin not on metal2")
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self.add_layout_pin(text=self.get_din_name(row,col),
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self.add_layout_pin(text=self.get_din_name(row, col),
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layer=din_pin.layer,
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layer=din_pin.layer,
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offset=din_pin.ll(),
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offset=din_pin.ll(),
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width=din_pin.width(),
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width=din_pin.width(),
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height=din_pin.height())
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height=din_pin.height())
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dout_pin = self.dff_insts[row,col].get_pin("Q")
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dout_pin = self.dff_insts[row, col].get_pin("Q")
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debug.check(dout_pin.layer=="m2","DFF Q pin not on metal2")
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debug.check(dout_pin.layer=="m2", "DFF Q pin not on metal2")
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self.add_layout_pin(text=self.get_dout_name(row,col),
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self.add_layout_pin(text=self.get_dout_name(row, col),
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layer=dout_pin.layer,
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layer=dout_pin.layer,
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offset=dout_pin.ll(),
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offset=dout_pin.ll(),
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width=dout_pin.width(),
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width=dout_pin.width(),
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height=dout_pin.height())
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height=dout_pin.height())
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dout_bar_pin = self.dff_insts[row,col].get_pin("Qb")
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dout_bar_pin = self.dff_insts[row, col].get_pin("Qb")
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debug.check(dout_bar_pin.layer=="m2","DFF Qb pin not on metal2")
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debug.check(dout_bar_pin.layer=="m2", "DFF Qb pin not on metal2")
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self.add_layout_pin(text=self.get_dout_bar_name(row,col),
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self.add_layout_pin(text=self.get_dout_bar_name(row, col),
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layer=dout_bar_pin.layer,
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layer=dout_bar_pin.layer,
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offset=dout_bar_pin.ll(),
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offset=dout_bar_pin.ll(),
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width=dout_bar_pin.width(),
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width=dout_bar_pin.width(),
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height=dout_bar_pin.height())
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height=dout_bar_pin.height())
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# Create vertical spines to a single horizontal rail
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# Create vertical spines to a single horizontal rail
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clk_pin = self.dff_insts[0,0].get_pin("clk")
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clk_pin = self.dff_insts[0, 0].get_pin("clk")
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clk_ypos = 2*self.m3_pitch+self.m3_width
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clk_ypos = 2 * self.m3_pitch + self.m3_width
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debug.check(clk_pin.layer=="m2","DFF clk pin not on metal2")
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debug.check(clk_pin.layer=="m2", "DFF clk pin not on metal2")
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if self.columns==1:
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if self.columns==1:
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self.add_layout_pin(text="clk",
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self.add_layout_pin(text="clk",
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layer="m2",
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layer="m2",
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offset=clk_pin.ll().scale(1,0),
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offset=clk_pin.ll().scale(1, 0),
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width=self.m2_width,
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width=self.m2_width,
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height=self.height)
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height=self.height)
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else:
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else:
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self.add_layout_pin_segment_center(text="clk",
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self.add_layout_pin_segment_center(text="clk",
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layer="m3",
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layer="m3",
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start=vector(0,clk_ypos),
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start=vector(0, clk_ypos),
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end=vector(self.width,clk_ypos))
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end=vector(self.width, clk_ypos))
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for col in range(self.columns):
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for col in range(self.columns):
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clk_pin = self.dff_insts[0,col].get_pin("clk")
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clk_pin = self.dff_insts[0, col].get_pin("clk")
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# Make a vertical strip for each column
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# Make a vertical strip for each column
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self.add_rect(layer="m2",
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self.add_rect(layer="m2",
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offset=clk_pin.ll().scale(1,0),
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offset=clk_pin.ll().scale(1, 0),
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width=self.m2_width,
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width=self.m2_width,
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height=self.height)
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height=self.height)
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# Drop a via to the M3 pin
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# Drop a via to the M3 pin
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self.add_via_center(layers=self.m2_stack,
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self.add_via_center(layers=self.m2_stack,
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offset=vector(clk_pin.cx(),clk_ypos))
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offset=vector(clk_pin.cx(), clk_ypos))
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def get_clk_cin(self):
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def get_clk_cin(self):
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"""Return the total capacitance (in relative units) that the clock is loaded by in the dff array"""
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"""Return the total capacitance (in relative units) that the clock is loaded by in the dff array"""
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