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PEP8 cleanup, multiple vdd/gnd support

This commit is contained in:
mrg 2020-06-26 11:47:55 -07:00
parent e23d41c1d4
commit f57eeb88eb
1 changed files with 17 additions and 21 deletions
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12
compiler/modules/sense_amp_array.py
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@ -107,14 +107,10 @@ class sense_amp_array(design.design):
def place_sense_amp_array(self): def place_sense_amp_array(self):
from tech import cell_properties from tech import cell_properties
if self.bitcell.width > self.amp.width:
amp_spacing = self.bitcell.width
else:
amp_spacing = self.amp.width
for i in range(0, self.row_size, self.words_per_row): for i in range(0, self.row_size, self.words_per_row):
index = int(i / self.words_per_row) index = int(i / self.words_per_row)
xoffset = i * amp_spacing xoffset = i * self.bitcell.width
if cell_properties.bitcell.mirror.y and (i + self.column_offset) % 2: if cell_properties.bitcell.mirror.y and (i + self.column_offset) % 2:
mirror = "MY" mirror = "MY"
@ -128,7 +124,7 @@ class sense_amp_array(design.design):
# place spare sense amps (will share the same enable as regular sense amps) # place spare sense amps (will share the same enable as regular sense amps)
for i in range(0, self.num_spare_cols): for i in range(0, self.num_spare_cols):
index = self.word_size + i index = self.word_size + i
xoffset = ((self.word_size * self.words_per_row) + i) * amp_spacing xoffset = ((self.word_size * self.words_per_row) + i) * self.bitcell.width
if cell_properties.bitcell.mirror.y and (i + self.column_offset) % 2: if cell_properties.bitcell.mirror.y and (i + self.column_offset) % 2:
mirror = "MY" mirror = "MY"
@ -143,13 +139,13 @@ class sense_amp_array(design.design):
for i in range(len(self.local_insts)): for i in range(len(self.local_insts)):
inst = self.local_insts[i] inst = self.local_insts[i]
gnd_pin = inst.get_pin("gnd") for gnd_pin in inst.get_pins("gnd"):
self.add_power_pin(name="gnd", self.add_power_pin(name="gnd",
loc=gnd_pin.center(), loc=gnd_pin.center(),
start_layer=gnd_pin.layer, start_layer=gnd_pin.layer,
directions=("V", "V")) directions=("V", "V"))
vdd_pin = inst.get_pin("vdd") for vdd_pin in inst.get_pins("vdd"):
self.add_power_pin(name="vdd", self.add_power_pin(name="vdd",
loc=vdd_pin.center(), loc=vdd_pin.center(),
start_layer=vdd_pin.layer, start_layer=vdd_pin.layer,