mirror of https://github.com/VLSIDA/OpenRAM.git
Fix routing clk connections of dff arrays
This commit is contained in:
parent
0701fceb0b
commit
f43d4cc98f
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@ -132,22 +132,20 @@ class dff_array(design.design):
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width=self.m2_width,
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height=self.height)
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else:
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self.add_layout_pin(text="clk",
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layer="metal3",
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offset=vector(0,self.m3_pitch),
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width=self.width,
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height=self.m3_width)
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self.add_layout_pin_segment_center(text="clk",
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layer="metal3",
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start=vector(0,self.m3_pitch+self.m3_width),
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end=vector(self.width,self.m3_pitch+self.m3_width))
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for col in range(self.columns):
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clk_pin = self.dff_insts[0,col].get_pin("clk")
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# Make a vertical strip for each column
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self.add_layout_pin(text="clk",
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layer="metal2",
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offset=clk_pin.ll().scale(1,0),
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width=self.m2_width,
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height=self.height)
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self.add_rect(layer="metal2",
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offset=clk_pin.ll().scale(1,0),
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width=self.m2_width,
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height=self.height)
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# Drop a via to the M3 pin
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self.add_via_center(layers=("metal2","via2","metal3"),
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offset=clk_pin.center().scale(1,0))
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offset=vector(clk_pin.cx(),self.m3_pitch+self.m3_width))
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@ -17,7 +17,7 @@ class dff_buf_array(design.design):
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self.columns = columns
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if name=="":
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name = "dff_array_{0}x{1}".format(rows, columns)
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name = "dff_buf_array_{0}x{1}".format(rows, columns)
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design.design.__init__(self, name)
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debug.info(1, "Creating {}".format(self.name))
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@ -36,35 +36,35 @@ class dff_buf_array(design.design):
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self.DRC_LVS()
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def add_pins(self):
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for y in range(self.rows):
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for x in range(self.columns):
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self.add_pin(self.get_din_name(y,x))
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for y in range(self.rows):
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for x in range(self.columns):
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self.add_pin(self.get_dout_name(y,x))
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self.add_pin(self.get_dout_bar_name(y,x))
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for row in range(self.rows):
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for col in range(self.columns):
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self.add_pin(self.get_din_name(row,col))
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for row in range(self.rows):
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for col in range(self.columns):
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self.add_pin(self.get_dout_name(row,col))
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self.add_pin(self.get_dout_bar_name(row,col))
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self.add_pin("clk")
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self.add_pin("vdd")
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self.add_pin("gnd")
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def create_dff_array(self):
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self.dff_insts={}
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for y in range(self.rows):
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for x in range(self.columns):
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name = "Xdff_r{0}_c{1}".format(y,x)
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if (y % 2 == 0):
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base = vector(x*self.dff.width,y*self.dff.height)
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for row in range(self.rows):
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for col in range(self.columns):
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name = "Xdff_r{0}_c{1}".format(row,col)
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if (row % 2 == 0):
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base = vector(col*self.dff.width,row*self.dff.height)
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mirror = "R0"
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else:
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base = vector(x*self.dff.width,(y+1)*self.dff.height)
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base = vector(col*self.dff.width,(row+1)*self.dff.height)
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mirror = "MX"
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self.dff_insts[x,y]=self.add_inst(name=name,
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mod=self.dff,
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offset=base,
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mirror=mirror)
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self.connect_inst([self.get_din_name(y,x),
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self.get_dout_name(y,x),
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self.get_dout_bar_name(y,x),
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self.dff_insts[row,col]=self.add_inst(name=name,
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mod=self.dff,
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offset=base,
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mirror=mirror)
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self.connect_inst([self.get_din_name(row,col),
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self.get_dout_name(row,col),
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self.get_dout_bar_name(row,col),
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"clk",
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"vdd",
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"gnd"])
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@ -100,58 +100,38 @@ class dff_buf_array(design.design):
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return dout_bar_name
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def add_layout_pins(self):
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for row in range(self.rows):
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for col in range(self.columns):
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# Continous vdd rail along with label.
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vdd_pin=self.dff_insts[row,col].get_pin("vdd")
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self.add_power_pin("vdd", vdd_pin.lc())
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xoffsets = []
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for x in range(self.columns):
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xoffsets.append(self.dff_insts[x,0].get_pin("gnd").lx())
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for y in range(self.rows):
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# Route both supplies
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for n in ["vdd", "gnd"]:
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supply_pin = self.dff_insts[0,y].get_pin(n)
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supply_offset = supply_pin.ll()
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self.add_rect(layer="metal1",
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offset=supply_offset,
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width=self.width)
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# Add pins in two locations
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for xoffset in xoffsets:
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pin_pos = vector(xoffset, supply_pin.cy())
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self.add_via_center(layers=("metal1", "via1", "metal2"),
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offset=pin_pos,
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rotate=90)
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self.add_via_center(layers=("metal2", "via2", "metal3"),
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offset=pin_pos,
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rotate=90)
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self.add_layout_pin_rect_center(text=n,
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layer="metal3",
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offset=pin_pos)
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# Continous gnd rail along with label.
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gnd_pin=self.dff_insts[row,col].get_pin("gnd")
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self.add_power_pin("gnd", gnd_pin.lc())
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for y in range(self.rows):
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for x in range(self.columns):
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din_pin = self.dff_insts[x,y].get_pin("D")
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for row in range(self.rows):
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for col in range(self.columns):
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din_pin = self.dff_insts[row,col].get_pin("D")
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debug.check(din_pin.layer=="metal2","DFF D pin not on metal2")
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self.add_layout_pin(text=self.get_din_name(y,x),
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self.add_layout_pin(text=self.get_din_name(row,col),
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layer=din_pin.layer,
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offset=din_pin.ll(),
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width=din_pin.width(),
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height=din_pin.height())
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dout_pin = self.dff_insts[x,y].get_pin("Q")
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dout_pin = self.dff_insts[row,col].get_pin("Q")
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debug.check(dout_pin.layer=="metal2","DFF Q pin not on metal2")
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self.add_layout_pin(text=self.get_dout_name(y,x),
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self.add_layout_pin(text=self.get_dout_name(row,col),
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layer=dout_pin.layer,
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offset=dout_pin.ll(),
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width=dout_pin.width(),
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height=dout_pin.height())
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dout_bar_pin = self.dff_insts[x,y].get_pin("Qb")
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dout_bar_pin = self.dff_insts[row,col].get_pin("Qb")
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debug.check(dout_bar_pin.layer=="metal2","DFF Qb pin not on metal2")
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self.add_layout_pin(text=self.get_dout_bar_name(y,x),
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self.add_layout_pin(text=self.get_dout_bar_name(row,col),
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layer=dout_bar_pin.layer,
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offset=dout_bar_pin.ll(),
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width=dout_bar_pin.width(),
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@ -168,22 +148,21 @@ class dff_buf_array(design.design):
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width=self.m2_width,
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height=self.height)
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else:
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self.add_layout_pin(text="clk",
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layer="metal3",
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offset=vector(0,2*self.m2_width),
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width=self.width,
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height=self.m3_width)
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for x in range(self.columns):
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clk_pin = self.dff_insts[x,0].get_pin("clk")
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self.add_layout_pin_segment_center(text="clk",
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layer="metal3",
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start=vector(0,self.m3_pitch+self.m3_width),
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end=vector(self.width,self.m3_pitch+self.m3_width))
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for col in range(self.columns):
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clk_pin = self.dff_insts[0,col].get_pin("clk")
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# Make a vertical strip for each column
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self.add_layout_pin(text="clk",
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layer="metal2",
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offset=clk_pin.ll().scale(1,0),
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width=self.m2_width,
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height=self.height)
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self.add_rect(layer="metal2",
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offset=clk_pin.ll().scale(1,0),
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width=self.m2_width,
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height=self.height)
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# Drop a via to the M3 pin
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self.add_via_center(layers=("metal2","via2","metal3"),
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offset=clk_pin.center().scale(1,0) + vector(0,2*self.m2_width))
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offset=vector(clk_pin.cx(),self.m3_pitch+self.m3_width))
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@ -17,7 +17,7 @@ class dff_inv_array(design.design):
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self.columns = columns
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if name=="":
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name = "dff_array_{0}x{1}".format(rows, columns)
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name = "dff_inv_array_{0}x{1}".format(rows, columns)
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design.design.__init__(self, name)
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debug.info(1, "Creating {}".format(self.name))
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@ -36,35 +36,35 @@ class dff_inv_array(design.design):
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self.DRC_LVS()
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def add_pins(self):
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for y in range(self.rows):
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for x in range(self.columns):
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self.add_pin(self.get_din_name(y,x))
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for y in range(self.rows):
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for x in range(self.columns):
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self.add_pin(self.get_dout_name(y,x))
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self.add_pin(self.get_dout_bar_name(y,x))
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for row in range(self.rows):
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for col in range(self.columns):
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self.add_pin(self.get_din_name(row,col))
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for row in range(self.rows):
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for col in range(self.columns):
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self.add_pin(self.get_dout_name(row,col))
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self.add_pin(self.get_dout_bar_name(row,col))
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self.add_pin("clk")
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self.add_pin("vdd")
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self.add_pin("gnd")
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def create_dff_array(self):
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self.dff_insts={}
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for y in range(self.rows):
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for x in range(self.columns):
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name = "Xdff_r{0}_c{1}".format(y,x)
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if (y % 2 == 0):
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base = vector(x*self.dff.width,y*self.dff.height)
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for row in range(self.rows):
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for col in range(self.columns):
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name = "Xdff_r{0}_c{1}".format(row,col)
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if (row % 2 == 0):
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base = vector(col*self.dff.width,row*self.dff.height)
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mirror = "R0"
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else:
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base = vector(x*self.dff.width,(y+1)*self.dff.height)
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base = vector(col*self.dff.width,(row+1)*self.dff.height)
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mirror = "MX"
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self.dff_insts[x,y]=self.add_inst(name=name,
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mod=self.dff,
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offset=base,
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mirror=mirror)
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self.connect_inst([self.get_din_name(y,x),
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self.get_dout_name(y,x),
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self.get_dout_bar_name(y,x),
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self.dff_insts[row,col]=self.add_inst(name=name,
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mod=self.dff,
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offset=base,
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mirror=mirror)
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self.connect_inst([self.get_din_name(row,col),
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self.get_dout_name(row,col),
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self.get_dout_bar_name(row,col),
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"clk",
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"vdd",
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"gnd"])
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@ -100,47 +100,38 @@ class dff_inv_array(design.design):
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return dout_bar_name
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def add_layout_pins(self):
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for y in range(self.rows):
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# Continous vdd rail along with label.
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vdd_pin=self.dff_insts[0,y].get_pin("vdd")
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self.add_layout_pin(text="vdd",
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layer="metal1",
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offset=vdd_pin.ll(),
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width=self.width,
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height=self.m1_width)
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for row in range(self.rows):
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for col in range(self.columns):
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# Continous vdd rail along with label.
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vdd_pin=self.dff_insts[row,col].get_pin("vdd")
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self.add_power_pin("vdd", vdd_pin.lc())
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# Continous gnd rail along with label.
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gnd_pin=self.dff_insts[0,y].get_pin("gnd")
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self.add_layout_pin(text="gnd",
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layer="metal1",
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offset=gnd_pin.ll(),
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width=self.width,
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height=self.m1_width)
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# Continous gnd rail along with label.
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gnd_pin=self.dff_insts[row,col].get_pin("gnd")
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self.add_power_pin("gnd", gnd_pin.lc())
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for y in range(self.rows):
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for x in range(self.columns):
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din_pin = self.dff_insts[x,y].get_pin("D")
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for row in range(self.rows):
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for col in range(self.columns):
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din_pin = self.dff_insts[row,col].get_pin("D")
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debug.check(din_pin.layer=="metal2","DFF D pin not on metal2")
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self.add_layout_pin(text=self.get_din_name(y,x),
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self.add_layout_pin(text=self.get_din_name(row,col),
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layer=din_pin.layer,
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offset=din_pin.ll(),
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width=din_pin.width(),
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height=din_pin.height())
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dout_pin = self.dff_insts[x,y].get_pin("Q")
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dout_pin = self.dff_insts[row,col].get_pin("Q")
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debug.check(dout_pin.layer=="metal2","DFF Q pin not on metal2")
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self.add_layout_pin(text=self.get_dout_name(y,x),
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self.add_layout_pin(text=self.get_dout_name(row,col),
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layer=dout_pin.layer,
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offset=dout_pin.ll(),
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width=dout_pin.width(),
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height=dout_pin.height())
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dout_bar_pin = self.dff_insts[x,y].get_pin("Qb")
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dout_bar_pin = self.dff_insts[row,col].get_pin("Qb")
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debug.check(dout_bar_pin.layer=="metal2","DFF Qb pin not on metal2")
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self.add_layout_pin(text=self.get_dout_bar_name(y,x),
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self.add_layout_pin(text=self.get_dout_bar_name(row,col),
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layer=dout_bar_pin.layer,
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offset=dout_bar_pin.ll(),
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width=dout_bar_pin.width(),
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@ -157,22 +148,21 @@ class dff_inv_array(design.design):
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width=self.m2_width,
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height=self.height)
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else:
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self.add_layout_pin(text="clk",
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layer="metal3",
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offset=vector(0,0),
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width=self.width,
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height=self.m3_width)
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for x in range(self.columns):
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clk_pin = self.dff_insts[x,0].get_pin("clk")
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self.add_layout_pin_segment_center(text="clk",
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layer="metal3",
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start=vector(0,self.m3_pitch+self.m3_width),
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end=vector(self.width,self.m3_pitch+self.m3_width))
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for col in range(self.columns):
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clk_pin = self.dff_insts[0,col].get_pin("clk")
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# Make a vertical strip for each column
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self.add_layout_pin(text="clk",
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layer="metal2",
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offset=clk_pin.ll().scale(1,0),
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width=self.m2_width,
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height=self.height)
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self.add_rect(layer="metal2",
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offset=clk_pin.ll().scale(1,0),
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width=self.m2_width,
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height=self.height)
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# Drop a via to the M3 pin
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self.add_via_center(layers=("metal2","via2","metal3"),
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offset=clk_pin.center().scale(1,0))
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offset=vector(clk_pin.cx(),self.m3_pitch+self.m3_width))
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