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Add extra track spacings in some routes.

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This commit is contained in:
Matt Guthaus
2018-09-13 14:12:24 -07:00
parent c9806feb01
commit f4389bdd8f
4 changed files with 6 additions and 8 deletions
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technology/scn3me_subm/tech/tech.py
+1 -1
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@@ -174,7 +174,7 @@ drc["metal2_enclosure_via2"] = _lambda_
# Not a rule
drc["minarea_metal2"] = 0
# 14.2 Exact size
# 14.1 Exact size
drc["minwidth_via2"] = 2*_lambda_
# 14.2 Minimum spacing
drc["via2_to_via2"] = 3*_lambda_
technology/scn4m_subm/tech/tech.py
+1 -3
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@@ -189,8 +189,6 @@ drc["metal3_to_metal3"] = 3*_lambda_
drc["metal3_extend_via2"] = _lambda_
# Reserved for asymmetric enclosures
drc["metal3_enclosure_via2"] = _lambda_
# Reserved for asymmetric enclosures
drc["metal2_enclosure_via1"] = _lambda_
# 21.3 Minimum overlap by metal3
drc["metal3_extend_via3"] = _lambda_
# Reserved for asymmetric enclosures
@@ -212,7 +210,7 @@ drc["metal4_extend_via3"] = 2*_lambda_
# Reserved for asymmetric enclosures
drc["metal4_enclosure_via3"] = 2*_lambda_
# Not a rule
drc["minarea_metal3"] = 0
drc["minarea_metal4"] = 0
###################################################
##END DRC/LVS Rules