mirror of https://github.com/VLSIDA/OpenRAM.git
Merge branch 'dev' into documentation
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commit
f3058cba26
2
Makefile
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Makefile
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@ -84,7 +84,7 @@ $(SRAM_LIB_DIR): check-pdk-root
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git clone $(SRAM_LIB_GIT_REPO) $(SRAM_LIB_DIR) && \
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git clone $(SRAM_LIB_GIT_REPO) $(SRAM_LIB_DIR) && \
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cd $(SRAM_LIB_DIR) && git pull && git checkout $(SRAM_LIB_GIT_COMMIT))
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cd $(SRAM_LIB_DIR) && git pull && git checkout $(SRAM_LIB_GIT_COMMIT))
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install: $(SRAM_LIB_DIR) pdk
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install: $(SRAM_LIB_DIR)
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@[ -d $(PDK_ROOT)/sky130A ] || \
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@[ -d $(PDK_ROOT)/sky130A ] || \
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(echo "Warning: $(PDK_ROOT)/sky130A not found!! Run make pdk first." && false)
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(echo "Warning: $(PDK_ROOT)/sky130A not found!! Run make pdk first." && false)
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@[ -d $(PDK_ROOT)/skywater-pdk ] || \
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@[ -d $(PDK_ROOT)/skywater-pdk ] || \
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10
README.md
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README.md
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@ -42,6 +42,16 @@ updating.
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OpenRAM is licensed under the [BSD 3-clause License](./LICENSE).
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OpenRAM is licensed under the [BSD 3-clause License](./LICENSE).
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# Publications
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+ M. R. Guthaus, J. E. Stine, S. Ataei, B. Chen, B. Wu, M. Sarwar, "OpenRAM: An Open-Source Memory Compiler," Proceedings of the 35th International Conference on Computer-Aided Design (ICCAD), 2016
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+ S. Ataei, J. Stine, M. Guthaus, “A 64 kb differential single-port 12T SRAM design with a bit-interleaving scheme for low-voltage operation in 32 nm SOI CMOS,” International Conference on Computer Design (ICCD), 2016, pp. 499-506.
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+ E. Ebrahimi, M. Guthaus, J. Renau, “Timing Speculative SRAM”, IEEE In- ternational Symposium on Circuits and Systems (ISCAS), 2017
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+ B. Wu, J.E. Stine, M.R. Guthaus, "Fast and Area-Efficient Word-Line Optimization", IEEE International Symposium on Circuits and Systems (ISCAS), 2019
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+ B. Wu, M. Guthaus, "Bottom Up Approach for High Speed SRAM Word-line Buffer Insertion Optimization", IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2019
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+ H. Nichols, M. Grimes, J. Sowash, J. Cirimelli-Low, M. Guthaus "Automated Synthesis of Multi-Port Memories and Control", IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2019
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# Contributors & Acknowledgment
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# Contributors & Acknowledgment
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- [Matthew Guthaus] from [VLSIDA] created the OpenRAM project and is the lead architect.
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- [Matthew Guthaus] from [VLSIDA] created the OpenRAM project and is the lead architect.
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