Netlist only in verilog test

2020-04-02 12:43:19 -07:00 · 2020-04-02 12:43:19 -07:00 · f105c9ab36
parent 1d5e5e3607
commit f105c9ab36
1 changed files with 1 additions and 1 deletions
--- a/compiler/tests/25_verilog_sram_test.py
+++ b/compiler/tests/25_verilog_sram_test.py
@ -21,7 +21,7 @@ class verilog_test(openram_test):
        globals.init_openram(config_file)
        OPTS.route_supplies=False
        OPTS.check_lvsdrc=False
-        
+        OPTS.netlist_only=True
        from sram import sram
        from sram_config import sram_config
        c = sram_config(word_size=2,