Reworking control logic for veritcal poly. Rewrote delay line. Rewrote buffered-DFF array.

compiler/tests/04_pinvbuf_test.py

@@ -0,0 +1,36 @@
+#!/usr/bin/env python2.7
+"""
+Run a regresion test on a 2-row buffer cell
+"""
+
+import unittest
+from testutils import header,openram_test
+import sys,os
+sys.path.append(os.path.join(sys.path[0],".."))
+import globals
+from globals import OPTS
+import debug
+
+class pinvbuf_test(openram_test):
+
+    def runTest(self):
+        globals.init_openram("config_20_{0}".format(OPTS.tech_name))
+        global verify
+        import verify
+        OPTS.check_lvsdrc = False
+
+        import pinvbuf
+
+        debug.info(2, "Testing inverter/buffer 4x 8x")
+        a = pinvbuf.pinvbuf(4,8)
+        self.local_check(a)
+
+        OPTS.check_lvsdrc = True
+        globals.end_openram()
+
+# instantiate a copdsay of the class to actually run the test
+if __name__ == "__main__":
+    (OPTS, args) = globals.parse_args()
+    del sys.argv[1:]
+    header(__file__, OPTS.tech_name)
+    unittest.main()

compiler/tests/11_dff_buf_array_test.py

@@ -0,0 +1,44 @@
+#!/usr/bin/env python2.7
+"""
+Run a regresion test on a dff_array.
+"""
+
+import unittest
+from testutils import header,openram_test
+import sys,os
+sys.path.append(os.path.join(sys.path[0],".."))
+import globals
+from globals import OPTS
+import debug
+
+class dff_buf_array_test(openram_test):
+
+    def runTest(self):
+        globals.init_openram("config_20_{0}".format(OPTS.tech_name))
+        global verify
+        import verify
+        OPTS.check_lvsdrc = False
+
+        import dff_buf_array
+
+        debug.info(2, "Testing dff_buf_array for 3x3")
+        a = dff_buf_array.dff_buf_array(rows=3, columns=3)
+        self.local_check(a)
+
+        debug.info(2, "Testing dff_buf_array for 1x3")
+        a = dff_buf_array.dff_buf_array(rows=1, columns=3)
+        self.local_check(a)
+
+        debug.info(2, "Testing dff_buf_array for 3x1")
+        a = dff_buf_array.dff_buf_array(rows=3, columns=1)
+        self.local_check(a)
+
+        OPTS.check_lvsdrc = True
+        globals.end_openram()
+
+# instantiate a copdsay of the class to actually run the test
+if __name__ == "__main__":
+    (OPTS, args) = globals.parse_args()
+    del sys.argv[1:]
+    header(__file__, OPTS.tech_name)
+    unittest.main()

compiler/tests/19_single_bank_test.py

@@ -34,9 +34,9 @@ class single_bank_test(openram_test):
         self.local_check(a)
 
         # Eight way has a short circuit of one column mux select to gnd rail
-        # debug.info(1, "Eight way column mux")
-        # a = bank.bank(word_size=2, num_words=128, words_per_row=8, num_banks=1, name="bank4")
-        # self.local_check(a)
+        debug.info(1, "Eight way column mux")
+        a = bank.bank(word_size=2, num_words=128, words_per_row=8, num_banks=1, name="bank4")
+        self.local_check(a)
         
         OPTS.check_lvsdrc = True
         globals.end_openram()