Only add drc errors from compiler

This commit is contained in:
Bugra Onal 2023-07-10 14:05:44 -07:00
parent eddc9af45b
commit ed0c93ba55
1 changed files with 2 additions and 1 deletions

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@ -802,7 +802,8 @@ class lib:
# information of checks
# run it only the first time
datasheet.write("{0},{1},".format(self.sram.drc_errors, self.sram.lvs_errors))
if OPTS.top_process != "memchar":
datasheet.write("{0},{1},".format(self.sram.drc_errors, self.sram.lvs_errors))
# write area
datasheet.write(str(self.sram.width * self.sram.height) + ',')