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Merge branch 'dev' into multiport_characterization

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Hunter Nichols
2018-11-19 15:42:48 -08:00
parent a55d907d03 b13d938ea8
commit e8f1c19af6
30 changed files with 783 additions and 930 deletions
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compiler/modules/bitcell_array.py
+7 -2
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@@ -4,7 +4,7 @@ from tech import drc, spice
from vector import vector
from globals import OPTS
unique_id = 1
class bitcell_array(design.design):
"""
@@ -12,8 +12,13 @@ class bitcell_array(design.design):
and word line is connected by abutment.
Connects the word lines and bit lines.
"""
unique_id = 1
def __init__(self, cols, rows, name=""):
def __init__(self, cols, rows, name="bitcell_array"):
if name == "":
name = "bitcell_array_{0}x{1}_{2}".format(rows,cols,bitcell_array.unique_id)
bitcell_array.unique_id += 1
design.design.__init__(self, name)
debug.info(1, "Creating {0} {1} x {2}".format(self.name, rows, cols))