Fix pin names to lower case. Fix write driver DRC errors and LVS error.

compiler/bank.py

@@ -234,8 +234,8 @@ class bank(design.design):
         """ Adding Precharge """
 
         # The wells must be far enough apart
-        # We use two well spacings because the bitcells tend to have a shared rail in the height
+        # The enclosure is for the well and the spacig is to the bitcell wells
-        y_offset = self.bitcell_array.height + 2*drc["pwell_to_nwell"]
+        y_offset = self.bitcell_array.height + 2*drc["pwell_to_nwell"] + drc["well_enclosure_active"]
         self.precharge_array_inst=self.add_inst(name="precharge_array",
                                                 mod=self.precharge_array, 
                                                 offset=vector(0,y_offset))

compiler/bitcell_array.py

@@ -26,7 +26,8 @@ class bitcell_array(design.design):
         self.cell = self.mod_bitcell()
         self.add_mod(self.cell)
 
-        self.height = self.row_size*self.cell.height 
+        # We increase it by a well enclosure so the precharges don't overlap our wells
+        self.height = self.row_size*self.cell.height + drc["well_enclosure_active"]
         self.width = self.column_size*self.cell.width 
         
         self.add_pins()

compiler/write_driver.py

@@ -11,7 +11,7 @@ class write_driver(design.design):
     the technology library.
     """
 
-    pin_names = ["din", "BL", "BR", "en", "gnd", "vdd"]
+    pin_names = ["din", "bl", "br", "en", "gnd", "vdd"]
     (width,height) = utils.get_libcell_size("write_driver", GDS["unit"], layer["boundary"])
     pin_map = utils.get_libcell_pins(pin_names, "write_driver", GDS["unit"], layer["boundary"])
 

compiler/write_driver_array.py

@@ -69,14 +69,14 @@ class write_driver_array(design.design):
                                 offset=din_pin.ll(),
                                 width=din_pin.width(),
                                 height=din_pin.height())
-            bl_pin = self.driver_insts[i].get_pin("BL")            
+            bl_pin = self.driver_insts[i].get_pin("bl")            
             self.add_layout_pin(text="bl[{0}]".format(i),
                                 layer="metal2",
                                 offset=bl_pin.ll(),
                                 width=bl_pin.width(),
                                 height=bl_pin.height())
                            
-            br_pin = self.driver_insts[i].get_pin("BR")
+            br_pin = self.driver_insts[i].get_pin("br")
             self.add_layout_pin(text="br[{0}]".format(i),
                                 layer="metal2",
                                 offset=br_pin.ll(),

technology/freepdk45/sp_lib/write_driver.sp

@@ -1,5 +1,5 @@
 
-.SUBCKT write_driver din bl br wen vdd gnd
+.SUBCKT write_driver din bl br en vdd gnd
 *inverters for enable and data input
 minP bl_bar din vdd vdd pmos_vtg w=360.000000n l=50.000000n
 minN bl_bar din gnd gnd nmos_vtg w=180.000000n l=50.000000n

technology/scn3me_subm/mag_lib/write_driver.mag

@@ -1,236 +1,236 @@
 magic
 tech scmos
-timestamp 1516828491
+timestamp 1517448475
 << nwell >>
-rect -3 100 37 137
+rect -3 101 37 138
-rect -3 -1 37 50
+rect -3 0 37 51
 << pwell >>
-rect -3 137 37 201
+rect -3 138 37 202
-rect -3 50 37 100
+rect -3 51 37 101
 << ntransistor >>
-rect 9 176 11 188
+rect 9 177 11 189
-rect 17 176 19 188
+rect 17 177 19 189
-rect 15 161 27 163
+rect 15 162 27 164
-rect 9 143 11 147
+rect 9 144 11 148
-rect 17 143 19 147
+rect 17 144 19 148
-rect 10 81 12 88
+rect 10 82 12 89
-rect 18 81 20 88
+rect 18 82 20 89
-rect 8 56 10 63
+rect 8 57 10 64
-rect 16 56 18 63
+rect 16 57 18 64
-rect 24 59 26 63
+rect 24 60 26 64
 << ptransistor >>
-rect 9 124 11 131
+rect 9 125 11 132
-rect 17 124 19 131
+rect 17 125 19 132
-rect 10 106 12 113
+rect 10 107 12 114
-rect 18 106 20 113
+rect 18 107 20 114
-rect 8 37 10 44
+rect 8 38 10 45
-rect 16 37 18 44
+rect 16 38 18 45
-rect 24 37 26 44
+rect 24 38 26 45
 << ndiffusion >>
-rect 8 176 9 188
+rect 8 177 9 189
-rect 11 176 12 188
+rect 11 177 12 189
-rect 16 176 17 188
+rect 16 177 17 189
-rect 19 176 20 188
+rect 19 177 20 189
-rect 15 163 27 164
+rect 15 164 27 165
-rect 15 160 27 161
+rect 15 161 27 162
-rect 12 156 15 159
+rect 12 157 15 160
-rect 12 155 16 156
+rect 12 156 16 157
-rect 8 143 9 147
+rect 8 144 9 148
-rect 11 143 12 147
+rect 11 144 12 148
-rect 16 143 17 147
+rect 16 144 17 148
-rect 19 143 20 147
+rect 19 144 20 148
-rect 9 81 10 88
+rect 9 82 10 89
-rect 12 81 13 88
+rect 12 82 13 89
-rect 17 81 18 88
+rect 17 82 18 89
-rect 20 81 21 88
+rect 20 82 21 89
-rect 25 81 26 85
+rect 25 82 26 86
-rect 7 56 8 63
+rect 7 57 8 64
-rect 10 56 11 63
+rect 10 57 11 64
-rect 15 56 16 63
+rect 15 57 16 64
-rect 18 56 19 63
+rect 18 57 19 64
-rect 23 59 24 63
+rect 23 60 24 64
-rect 26 59 27 63
+rect 26 60 27 64
 << pdiffusion >>
-rect 8 124 9 131
+rect 8 125 9 132
-rect 11 124 12 131
+rect 11 125 12 132
-rect 16 124 17 131
+rect 16 125 17 132
-rect 19 124 20 131
+rect 19 125 20 132
-rect 12 121 16 124
+rect 12 122 16 125
-rect 9 106 10 113
+rect 9 107 10 114
-rect 12 106 13 113
+rect 12 107 13 114
-rect 17 106 18 113
+rect 17 107 18 114
-rect 20 106 21 113
+rect 20 107 21 114
-rect 7 37 8 44
+rect 7 38 8 45
-rect 10 37 11 44
+rect 10 38 11 45
-rect 15 37 16 44
+rect 15 38 16 45
-rect 18 37 19 44
+rect 18 38 19 45
-rect 23 37 24 44
+rect 23 38 24 45
-rect 26 37 27 44
+rect 26 38 27 45
-rect 3 34 7 37
+rect 3 35 7 38
 << ndcontact >>
-rect 4 176 8 188
+rect 4 177 8 189
-rect 12 176 16 188
+rect 12 177 16 189
-rect 20 176 24 188
+rect 20 177 24 189
-rect 15 164 27 168
+rect 15 165 27 169
-rect 15 156 27 160
+rect 15 157 27 161
-rect 4 143 8 147
+rect 4 144 8 148
-rect 12 143 16 147
+rect 12 144 16 148
-rect 20 143 24 147
+rect 20 144 24 148
-rect 5 81 9 88
+rect 5 82 9 89
-rect 13 81 17 88
+rect 13 82 17 89
-rect 21 81 25 88
+rect 21 82 25 89
-rect 3 56 7 63
+rect 3 57 7 64
-rect 11 56 15 63
+rect 11 57 15 64
-rect 19 56 23 63
+rect 19 57 23 64
-rect 27 59 31 63
+rect 27 60 31 64
 << pdcontact >>
-rect 4 124 8 131
+rect 4 125 8 132
-rect 12 124 16 131
+rect 12 125 16 132
-rect 20 124 24 131
+rect 20 125 24 132
-rect 5 106 9 113
+rect 5 107 9 114
-rect 13 106 17 113
+rect 13 107 17 114
-rect 21 106 25 113
+rect 21 107 25 114
-rect 3 37 7 44
+rect 3 38 7 45
-rect 11 37 15 44
+rect 11 38 15 45
-rect 19 37 23 44
+rect 19 38 23 45
-rect 27 37 31 44
+rect 27 38 31 45
 << psubstratepcontact >>
-rect 12 151 16 155
+rect 12 152 16 156
-rect 26 81 30 85
+rect 26 82 30 86
 << nsubstratencontact >>
-rect 12 117 16 121
+rect 12 118 16 122
-rect 3 30 7 34
+rect 3 31 7 35
 << polysilicon >>
-rect 9 193 30 195
+rect 9 194 30 196
-rect 9 188 11 193
+rect 9 189 11 194
-rect 17 188 19 190
+rect 17 189 19 191
-rect 28 184 30 193
+rect 28 185 30 194
-rect 9 174 11 176
+rect 9 175 11 177
-rect 17 171 19 176
+rect 17 172 19 177
-rect 6 169 19 171
+rect 6 170 19 172
-rect 6 166 8 169
+rect 6 167 8 170
-rect 13 161 15 163
+rect 13 162 15 164
-rect 27 161 33 163
+rect 27 162 33 164
-rect 9 147 11 149
+rect 9 148 11 150
-rect 17 147 19 149
+rect 17 148 19 150
-rect 9 131 11 143
+rect 9 132 11 144
-rect 17 131 19 143
+rect 17 132 19 144
-rect 9 123 11 124
+rect 9 124 11 125
-rect 2 121 11 123
+rect 2 122 11 124
-rect 17 123 19 124
+rect 17 124 19 125
-rect 17 121 28 123
+rect 17 122 28 124
-rect 2 74 4 121
+rect 2 75 4 122
-rect 10 113 12 115
+rect 10 114 12 116
-rect 18 113 20 115
+rect 18 114 20 116
-rect 10 88 12 106
+rect 10 89 12 107
-rect 18 105 20 106
+rect 18 106 20 107
-rect 16 103 20 105
+rect 16 104 20 106
-rect 16 91 18 103
+rect 16 92 18 104
-rect 26 99 28 121
+rect 26 100 28 122
-rect 27 95 28 99
+rect 27 96 28 100
-rect 16 89 20 91
+rect 16 90 20 92
-rect 18 88 20 89
+rect 18 89 20 90
-rect 10 80 12 81
+rect 10 81 12 82
-rect 10 78 13 80
+rect 10 79 13 81
-rect 2 70 3 74
+rect 2 71 3 75
-rect 11 70 13 78
+rect 11 71 13 79
-rect 18 78 20 81
+rect 18 79 20 82
-rect 18 76 23 78
+rect 18 77 23 79
-rect 31 70 33 161
+rect 31 71 33 162
-rect 11 68 33 70
+rect 11 69 33 71
-rect 11 66 13 68
+rect 11 67 13 69
-rect 8 64 13 66
+rect 8 65 13 67
-rect 8 63 10 64
+rect 8 64 10 65
-rect 16 63 18 65
+rect 16 64 18 66
-rect 24 63 26 65
+rect 24 64 26 66
-rect 8 44 10 56
+rect 8 45 10 57
-rect 16 51 18 56
+rect 16 52 18 57
-rect 24 51 26 59
+rect 24 52 26 60
-rect 16 49 26 51
+rect 16 50 26 52
-rect 16 44 18 49
+rect 16 45 18 50
-rect 24 44 26 49
+rect 24 45 26 50
-rect 8 27 10 37
+rect 8 28 10 38
-rect 16 13 18 37
+rect 16 14 18 38
-rect 24 35 26 37
+rect 24 36 26 38
 << polycontact >>
-rect 28 180 32 184
+rect 28 181 32 185
-rect 4 162 8 166
+rect 4 163 8 167
-rect 23 95 27 99
+rect 23 96 27 100
-rect 3 70 7 74
+rect 3 71 7 75
-rect 23 74 27 78
+rect 23 75 27 79
-rect 7 23 11 27
+rect 7 24 11 28
-rect 16 9 20 13
+rect 16 10 20 14
 << metal1 >>
-rect 5 188 8 190
+rect 5 189 8 191
-rect 32 180 33 184
+rect 32 181 33 185
-rect 13 168 16 176
+rect 13 169 16 177
-rect 13 164 15 168
+rect 13 165 15 169
-rect 4 147 8 162
+rect 4 148 8 163
-rect 12 155 16 156
+rect 12 156 16 157
-rect 12 147 16 151
+rect 12 148 16 152
-rect 4 131 8 143
+rect 4 132 8 144
-rect 20 141 24 143
+rect 20 142 24 144
-rect 30 141 33 180
+rect 30 142 33 181
-rect 20 137 33 141
+rect 20 138 33 142
-rect 20 131 24 137
+rect 20 132 24 138
-rect 12 121 16 124
+rect 12 122 16 125
-rect 0 117 8 121
+rect 0 118 8 122
-rect 16 117 36 121
+rect 16 118 36 122
-rect 13 113 17 117
+rect 13 114 17 118
-rect 5 103 9 106
+rect 5 104 9 107
-rect 21 103 25 106
+rect 21 104 25 107
-rect 5 100 25 103
+rect 5 101 25 104
-rect 5 88 9 100
+rect 5 89 9 101
-rect 21 99 25 100
+rect 21 100 25 101
-rect 21 95 23 99
+rect 21 96 23 100
-rect 25 81 26 85
+rect 25 82 26 86
-rect 4 63 7 70
+rect 4 64 7 71
-rect 27 63 31 78
+rect 27 64 31 79
-rect 3 50 7 56
+rect 3 51 7 57
-rect 3 47 15 50
+rect 3 48 15 51
-rect 11 44 15 47
+rect 11 45 15 48
-rect 27 44 31 59
+rect 27 45 31 60
-rect 3 34 7 37
+rect 3 35 7 38
-rect 19 34 23 37
+rect 19 35 23 38
-rect 0 30 3 34
+rect 0 31 3 35
-rect 7 30 8 34
+rect 7 31 8 35
-rect 12 30 36 34
+rect 12 31 36 35
-rect 0 23 7 27
+rect 0 24 7 28
-rect 11 23 36 27
+rect 11 24 36 28
-rect 0 16 32 20
+rect 0 17 32 21
 << m2contact >>
-rect 5 190 9 194
+rect 5 191 9 195
-rect 20 188 24 192
+rect 20 189 24 193
-rect 11 156 15 160
+rect 11 157 15 161
-rect 8 117 12 121
+rect 8 118 12 122
-rect 30 81 34 85
+rect 30 82 34 86
-rect 19 63 23 67
+rect 19 64 23 68
-rect 8 30 12 34
+rect 8 31 12 35
-rect 32 16 36 20
+rect 32 17 36 21
-rect 12 9 16 13
+rect 12 10 16 14
 << metal2 >>
-rect 10 194 14 201
+rect 10 195 14 202
-rect 9 190 14 194
+rect 9 191 14 195
-rect 20 192 24 201
+rect 20 193 24 202
-rect 20 176 24 188
+rect 20 177 24 189
-rect 32 160 36 195
+rect 32 161 36 196
-rect 15 156 36 160
+rect 15 157 36 161
-rect 8 34 12 117
+rect 8 35 12 118
-rect 32 85 36 156
+rect 32 86 36 157
-rect 34 81 36 85
+rect 34 82 36 86
-rect 32 71 36 81
+rect 32 72 36 82
-rect 19 67 36 71
+rect 19 68 36 72
-rect 32 20 36 67
+rect 32 21 36 68
-rect 16 9 20 13
+rect 16 10 20 14
-rect 15 0 19 9
+rect 15 0 19 10
-rect 32 0 36 16
+rect 32 0 36 17
 << m3p >>
-rect 0 0 34 201
+rect 0 0 34 202
 << labels >>
-rlabel metal1 0 30 0 30 1 vdd
+rlabel metal1 0 31 0 31 1 vdd
-rlabel metal1 0 16 0 16 7 gnd
+rlabel metal1 0 17 0 17 7 gnd
-rlabel metal2 15 0 15 0 1 din
+rlabel metal2 15 1 15 1 1 din
-rlabel metal1 0 23 3 24 3 en
+rlabel metal1 2 25 2 25 3 en
-rlabel metal2 11 197 11 197 5 BL
+rlabel metal2 12 200 12 200 5 bl
-rlabel metal2 21 197 21 197 5 BR
+rlabel metal2 22 200 22 200 5 br
 << end >>

technology/scn3me_subm/sp_lib/write_driver.sp

@@ -1,5 +1,5 @@
 *********************** Write_Driver ******************************
-.SUBCKT write_driver din bl br wen vdd gnd
+.SUBCKT write_driver din bl br en vdd gnd
 
 **** Inverter to conver Data_in to data_in_bar ******
 M_1 net_3 din gnd gnd n W='1.2*1u' L=0.6u