Added graph creation and functions in base class and lower level modules.

This commit is contained in:
Hunter Nichols
2019-04-24 14:23:22 -07:00
parent 4f28295e20
commit e292767166
23 changed files with 196 additions and 10 deletions
+8
View File
@@ -50,3 +50,11 @@ class dff(design.design):
#Calculated in the tech file by summing the widths of all the gates and dividing by the minimum width.
return parameter["dff_clk_cin"]
def build_graph(self, graph, inst_name, port_nets):
"""Adds edges to graph. Handmade cells must implement this manually."""
#The cell has 5 net ports hard-coded in self.pin_names. The edges
#are based on the hard-coded name positions.
# The edges added are: clk->Q.
# Internal nodes of the handmade cell not considered, only ports. vdd/gnd ignored for graph.
graph.add_edge(port_nets[2],port_nets[1])