Clean up new code for add_modules, add_pins and netlist/layouts.

This commit is contained in:
Matt Guthaus
2018-08-28 10:24:09 -07:00
parent 6401cbf2a6
commit e17c69be3e
23 changed files with 466 additions and 333 deletions
+12 -4
View File
@@ -20,9 +20,9 @@ class precharge_array(design.design):
debug.info(1, "Creating {0}".format(self.name))
self.columns = columns
self.pc_cell = precharge(name="precharge", size=size, bitcell_bl=bitcell_bl, bitcell_br=bitcell_br)
self.add_mod(self.pc_cell)
self.size = size
self.bitcell_bl = bitcell_bl
self.bitcell_br = bitcell_br
self.create_netlist()
if not OPTS.netlist_only:
@@ -37,6 +37,7 @@ class precharge_array(design.design):
self.add_pin("vdd")
def create_netlist(self):
self.add_modules()
self.add_pins()
self.create_insts()
@@ -47,8 +48,15 @@ class precharge_array(design.design):
self.place_insts()
self.add_layout_pins()
self.DRC_LVS()
def add_modules(self):
self.pc_cell = precharge(name="precharge",
size=self.size,
bitcell_bl=self.bitcell_bl,
bitcell_br=self.bitcell_br)
self.add_mod(self.pc_cell)
def add_layout_pins(self):
self.add_layout_pin(text="en",