mirror of https://github.com/VLSIDA/OpenRAM.git
Add status for supply routing.
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@ -79,8 +79,8 @@ class supply_tree_router(router):
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"""
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"""
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remaining_components = sum(not x.is_routed() for x in self.pin_groups[pin_name])
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remaining_components = sum(not x.is_routed() for x in self.pin_groups[pin_name])
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debug.info(1, "Routing {0} with {1} pin components to connect.".format(pin_name,
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debug.info(1, "Routing {0} with {1} pins.".format(pin_name,
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remaining_components))
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remaining_components))
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# Create full graph
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# Create full graph
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debug.info(2, "Creating adjacency matrix")
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debug.info(2, "Creating adjacency matrix")
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@ -108,7 +108,9 @@ class supply_tree_router(router):
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connections.append((x, y))
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connections.append((x, y))
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# Route MST components
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# Route MST components
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for (src, dest) in connections:
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for index, (src, dest) in enumerate(connections):
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if not (index % 100):
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debug.info(0, "{0} supply segments routed, {1} remaining.".format(index, len(connections) - index))
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self.route_signal(pin_name, src, dest)
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self.route_signal(pin_name, src, dest)
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# if pin_name == "gnd":
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# if pin_name == "gnd":
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# print("\nSRC {}: ".format(src) + str(self.pin_groups[pin_name][src].grids) + str(self.pin_groups[pin_name][src].blockages))
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# print("\nSRC {}: ".format(src) + str(self.pin_groups[pin_name][src].grids) + str(self.pin_groups[pin_name][src].blockages))
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