luke/OpenRAM
1
0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-09-02 11:08:01 +02:00
Code Issues Packages Projects Releases Wiki Activity

Fixed issues with analytical sram test. Changed syntax errors in golden lib file.

Browse Source
This commit is contained in:
Hunter Nichols
2018-09-06 17:01:10 -07:00
parent f824d039c6
commit dd22f9acd5
5 changed files with 66 additions and 93 deletions
Download Patch File Download Diff File Expand all files Collapse all files
compiler/tests/golden/sram_2_16_1_scn3me_subm_TT_5p0V_25C_analytical.lib
+6 -39
View File
@@ -87,20 +87,20 @@ cell (sram_2_16_1_scn3me_subm){
cell_leakage_power : 0;
bus(DIN){
bus_type : DATA;
direction : in;
max_capacitance : 78.5936;
min_capacitance : 2.45605;
direction : input;
capacitance : 9.8242;
memory_write(){
address : ADDR;
address : ADDR0;
clocked_on : clk;
}
}
bus(DOUT){
bus_type : DATA;
direction : out;
direction : output;
max_capacitance : 78.5936;
min_capacitance : 2.45605;
memory_read(){
address : ADDR;
address : ADDR0;
}
pin(DOUT[1:0]){
timing(){
@@ -229,39 +229,6 @@ cell (sram_2_16_1_scn3me_subm){
}
}
pin(OEb){
direction : input;
capacitance : 9.8242;
timing(){
timing_type : setup_rising;
related_pin : "clk";
rise_constraint(CONSTRAINT_TABLE) {
values("0.009, 0.009, 0.009",\
"0.009, 0.009, 0.009",\
"0.009, 0.009, 0.009");
}
fall_constraint(CONSTRAINT_TABLE) {
values("0.009, 0.009, 0.009",\
"0.009, 0.009, 0.009",\
"0.009, 0.009, 0.009");
}
}
timing(){
timing_type : hold_rising;
related_pin : "clk";
rise_constraint(CONSTRAINT_TABLE) {
values("0.001, 0.001, 0.001",\
"0.001, 0.001, 0.001",\
"0.001, 0.001, 0.001");
}
fall_constraint(CONSTRAINT_TABLE) {
values("0.001, 0.001, 0.001",\
"0.001, 0.001, 0.001",\
"0.001, 0.001, 0.001");
}
}
}
pin(WEb){
direction : input;
capacitance : 9.8242;
compiler/tests/testutils.py
+3
View File
@@ -183,6 +183,9 @@ class openram_test(unittest.TestCase):
# 4. Check if remaining string matches
if line1 != line2:
#Uncomment if you want to see all the chars of the two lines separated
#print(str([i for i in line1]))
#print(str([i for i in line2]))
if mismatches==0:
debug.error("Mismatching files:\nfile1={0}\nfile2={1}".format(filename1,filename2))
mismatches += 1