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https://github.com/VLSIDA/OpenRAM.git
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standalone char and func
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@@ -173,9 +173,14 @@ class sram():
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# Characterize the design
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start_time = datetime.datetime.now()
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from characterizer import lib
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debug.print_raw("LIB: Characterizing... ")
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lib(out_dir=OPTS.output_path, sram=self.s, sp_file=self.get_sp_name())
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from characterizer import delay
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debug.print_raw("LIB: Writing Analysis File... ")
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d = delay(self, self.get_sp_name(), ("TT", 5, 25))
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if (self.sram.num_spare_rows == 0):
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probe_address = "1" * self.sram.addr_size
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else:
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probe_address = "0" + "1" * (self.sram.addr_size - 1)
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d.analysis_init(probe_address, probe_data)
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print_time("Characterization", datetime.datetime.now(), start_time)
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# Write the config file
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@@ -39,11 +39,6 @@ class sram_config:
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except ImportError:
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self.array_col_multiple = 1
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if self.write_size:
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self.num_wmasks = int(ceil(self.word_size / self.write_size))
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else:
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self.num_wmasks = 0
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if not self.num_spare_cols:
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self.num_spare_cols = 0
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