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Merge 6c7c6a9fba into ed369f1af4

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Felix Schneider 2026-06-27 11:52:46 -07:00 committed by GitHub
parent ed369f1af4 6c7c6a9fba
commit da3cdbe4fa
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GPG Key ID: B5690EEEBB952194
4 changed files with 28 additions and 29 deletions
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3
compiler/base/wire_spice_model.py
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@ -18,8 +18,7 @@ class wire_spice_model():
def cal_wire_c(self, wire_length, wire_width): def cal_wire_c(self, wire_length, wire_width):
from openram.tech import spice from openram.tech import spice
# Convert the F/um^2 to fF/um^2 then multiple by width and length # Convert the F/um^2 to fF/um^2 then multiple by width and length
# FIXME: shouldn't it be 1e15? total_c = (spice["wire_unit_c"]*1e15) * wire_length * wire_width
total_c = (spice["wire_unit_c"]*1e12) * wire_length * wire_width
wire_c = total_c / self.lump_num wire_c = total_c / self.lump_num
return wire_c return wire_c

2
technology/gf180mcu/tech/tech.py
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@ -432,7 +432,7 @@ spice["nom_temperature"] = 25 # Nominal temperature (celcius)
# analytical delay parameters # analytical delay parameters
spice["nom_threshold"] = 0.49 # Typical Threshold voltage in Volts spice["nom_threshold"] = 0.49 # Typical Threshold voltage in Volts
spice["wire_unit_r"] = 0.125 # Unit wire resistance in ohms/square spice["wire_unit_r"] = 0.125 # Unit wire resistance in ohms/square
spice["wire_unit_c"] = 0.134 # Unit wire capacitance ff/um^2 spice["wire_unit_c"] = 0.134e-15 # Unit wire capacitance F/um^2
spice["min_tx_drain_c"] = 0.7 # Minimum transistor drain capacitance in ff spice["min_tx_drain_c"] = 0.7 # Minimum transistor drain capacitance in ff
spice["min_tx_gate_c"] = 0.2 # Minimum transistor gate capacitance in ff spice["min_tx_gate_c"] = 0.2 # Minimum transistor gate capacitance in ff
spice["dff_setup"] = 102.5391 # DFF setup time in ps spice["dff_setup"] = 102.5391 # DFF setup time in ps

2
technology/scn3me_subm/tech/tech.py
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@ -260,7 +260,7 @@ spice["nom_temperature"] = 25 # Nominal temperature (celcius)
spice["nom_threshold"] = 1.3 # Typical Threshold voltage in Volts spice["nom_threshold"] = 1.3 # Typical Threshold voltage in Volts
# FIXME: These need to be updated for SCMOS, they are copied from FreePDK45. # FIXME: These need to be updated for SCMOS, they are copied from FreePDK45.
spice["wire_unit_r"] = 0.075 # Unit wire resistance in ohms/square spice["wire_unit_r"] = 0.075 # Unit wire resistance in ohms/square
spice["wire_unit_c"] = 0.64 # Unit wire capacitance ff/um^2 spice["wire_unit_c"] = 0.64e-15 # Unit wire capacitance F/um^2
spice["min_tx_drain_c"] = 0.7 # Minimum transistor drain capacitance in ff spice["min_tx_drain_c"] = 0.7 # Minimum transistor drain capacitance in ff
spice["min_tx_gate_c"] = 0.1 # Minimum transistor gate capacitance in ff spice["min_tx_gate_c"] = 0.1 # Minimum transistor gate capacitance in ff
spice["dff_setup"] = 9 # DFF setup time in ps spice["dff_setup"] = 9 # DFF setup time in ps

2
technology/sky130/tech/tech.py
View File

@ -735,7 +735,7 @@ spice["nom_temperature"] = 25 # Nominal temperature (celcius)
# analytical delay parameters # analytical delay parameters
spice["nom_threshold"] = 0.49 # Typical Threshold voltage in Volts spice["nom_threshold"] = 0.49 # Typical Threshold voltage in Volts
spice["wire_unit_r"] = 0.125 # Unit wire resistance in ohms/square spice["wire_unit_r"] = 0.125 # Unit wire resistance in ohms/square
spice["wire_unit_c"] = 0.134 # Unit wire capacitance ff/um^2 spice["wire_unit_c"] = 0.134e-15 # Unit wire capacitance F/um^2
spice["min_tx_drain_c"] = 0.7 # Minimum transistor drain capacitance in ff spice["min_tx_drain_c"] = 0.7 # Minimum transistor drain capacitance in ff
spice["min_tx_gate_c"] = 0.2 # Minimum transistor gate capacitance in ff spice["min_tx_gate_c"] = 0.2 # Minimum transistor gate capacitance in ff
spice["dff_setup"] = 102.5391 # DFF setup time in ps spice["dff_setup"] = 102.5391 # DFF setup time in ps