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https://github.com/VLSIDA/OpenRAM.git
synced 2026-09-02 11:08:01 +02:00
Fix LEF mismatch due to path/wire hierarchy change. Add characterizer feasible delay/slew check. Update delay tests with new delays.
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@@ -21,36 +21,57 @@ class path_test(unittest.TestCase):
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import path
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import tech
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import design
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min_space = 2 * tech.drc["minwidth_metal1"]
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layer_stack = ("metal1")
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position_list = [[0, 0],
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[0, 3 * min_space],
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[1 * min_space, 3 * min_space],
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[4 * min_space, 3 * min_space],
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[4 * min_space, 0],
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[7 * min_space, 0],
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[7 * min_space, 4 * min_space],
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[-1 * min_space, 4 * min_space],
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[-1 * min_space, 0]]
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# checks if we can retrace a path
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position_list = [[0,0],
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[0, 3 * min_space ],
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[4 * min_space, 3 * min_space ],
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[4 * min_space, 3 * min_space ],
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[0, 3 * min_space ],
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[0, 6 * min_space ]]
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OPTS.check_lvsdrc = False
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w = path.path(layer_stack, position_list)
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w = design.design("path_test0")
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path.path(w,layer_stack, position_list)
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self.local_check(w)
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OPTS.check_lvsdrc = True
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min_space = 2 * tech.drc["minwidth_metal1"]
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layer_stack = ("metal1")
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old_position_list = [[0, 0],
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[0, 3 * min_space],
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[1 * min_space, 3 * min_space],
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[4 * min_space, 3 * min_space],
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[4 * min_space, 0],
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[7 * min_space, 0],
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[7 * min_space, 4 * min_space],
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[-1 * min_space, 4 * min_space],
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[-1 * min_space, 0]]
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position_list = [[x+min_space, y+min_space] for x,y in old_position_list]
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OPTS.check_lvsdrc = False
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w = design.design("path_test1")
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path.path(w,layer_stack, position_list)
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self.local_check(w)
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OPTS.check_lvsdrc = True
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min_space = 2 * tech.drc["minwidth_metal2"]
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layer_stack = ("metal2")
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position_list = [[0, 0],
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[0, 3 * min_space],
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[1 * min_space, 3 * min_space],
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[4 * min_space, 3 * min_space],
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[4 * min_space, 0],
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[7 * min_space, 0],
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[7 * min_space, 4 * min_space],
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[-1 * min_space, 4 * min_space],
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[-1 * min_space, 0]]
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old_position_list = [[0, 0],
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[0, 3 * min_space],
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[1 * min_space, 3 * min_space],
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[4 * min_space, 3 * min_space],
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[4 * min_space, 0],
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[7 * min_space, 0],
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[7 * min_space, 4 * min_space],
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[-1 * min_space, 4 * min_space],
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[-1 * min_space, 0]]
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position_list = [[x-min_space, y-min_space] for x,y in old_position_list]
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OPTS.check_lvsdrc = False
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w = path.path(layer_stack, position_list)
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w = design.design("path_test2")
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path.path(w, layer_stack, position_list)
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self.local_check(w)
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OPTS.check_lvsdrc = True
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@@ -68,7 +89,8 @@ class path_test(unittest.TestCase):
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# run on the reverse list
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position_list.reverse()
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OPTS.check_lvsdrc = False
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w = path.path(layer_stack, position_list)
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w = design.design("path_test3")
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path.path(w, layer_stack, position_list)
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OPTS.check_lvsdrc = True
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self.local_check(w)
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