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Added power calculations for inverter. Still testing.

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Hunter Nichols
2018-02-21 19:51:21 -08:00
parent 179a27b0e3
commit d4a0f48d4f
10 changed files with 101 additions and 46 deletions
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technology/freepdk45/tech/tech.py
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@@ -275,6 +275,13 @@ spice["msflop_delay"] = 20.5 # DFF Clk-to-q delay in ps
spice["msflop_slew"] = 13.1 # DFF output slew in ps w/ no load
spice["msflop_in_cap"] = 0.2091 # Input capacitance of ms_flop (Din) [Femto-farad]
# analytical power parameters
spice["bitcell_leakage"] = 1 # Leakage power of a single bitcell in nano-Watts
spice["inv_leakage"] = 1 # Leakage power of inverter, temporary until a way to calculate is determined, in nW
spice["msflop_power"] = 1 # Total power of a single flop in nano-Watts
spice["default_event_rate"] = 200 # Default event activity of every gate. Temporary value. In Mega-Hz
spice["inv_transisition_prob"] = .5 # Transition probability of inverter. Will be dynamically calculated later.
###################################################
##END Spice Simulation Parameters