mirror of https://github.com/VLSIDA/OpenRAM.git
Fix typo in model delay test
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@ -93,7 +93,7 @@ class model_delay_test(openram_test):
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else:
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self.assertTrue(False) # other techs fail
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debug.info(3, 'spice_delays {}'.fomrat(spice_delays))
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debug.info(3, 'spice_delays {}'.format(spice_delays))
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debug.info(3, 'model_delays {}'.format(model_delays))
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# Check if no too many or too few results
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