Redesign of pbitcell for newer process technolgies.

2018-10-15 06:29:51 -07:00 · 2018-10-15 06:29:51 -07:00 · c8c70401ae
parent d1701b8a2a
commit c8c70401ae
2 changed files with 367 additions and 679 deletions
--- a/compiler/base/design.py
+++ b/compiler/base/design.py
@ -43,6 +43,7 @@ class design(hierarchy_design):

        self.poly_to_active = drc["poly_to_active"]
        self.poly_extend_active = drc["poly_extend_active"]
+        self.poly_to_polycontact = drc["poly_to_polycontact"]
        self.contact_to_gate = drc["contact_to_gate"]
        self.well_enclose_active = drc["well_enclosure_active"]
        self.implant_enclose_active = drc["implant_enclosure_active"]
--- a/compiler/pgates/pbitcell.py
+++ b/compiler/pgates/pbitcell.py