mirror of https://github.com/VLSIDA/OpenRAM.git
restore netlist on memchar
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parent
2d8d90952e
commit
c6440dc16d
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@ -1130,15 +1130,17 @@ class delay(simulation):
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Netlist reduced for simulation.
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"""
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super().set_probe(probe_address, probe_data)
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self.prepare_netlist()
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def prepare_netlist(self):
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""" Prepare a trimmed netlist and regular netlist. """
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# Set up to trim the netlist here if that is enabled
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# TODO: Copy old netlist if memchar
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if OPTS.trim_netlist:
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self.trim_sp_file = "{0}trimmed.sp".format(self.output_path)
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self.sram.sp_write(self.trim_sp_file, lvs=False, trim=True)
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# Only genrate spice when running openram process
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if OPTS.top_process == "openram":
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self.sram.sp_write(self.trim_sp_file, lvs=False, trim=True)
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else:
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# The non-reduced netlist file when it is disabled
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self.trim_sp_file = "{0}sram.sp".format(self.output_path)
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@ -1153,6 +1155,7 @@ class delay(simulation):
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"""Sets values which are dependent on the data address/bit being tested."""
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self.set_probe(probe_address, probe_data)
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self.prepare_netlist()
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self.create_graph()
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self.set_internal_spice_names()
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self.create_measurement_names()
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@ -10,44 +10,9 @@ class fake_sram(sram_config):
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"""
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def __init__(self, name, word_size, num_words, write_size=None, num_banks=1,
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words_per_row=None, num_spare_rows=0, num_spare_cols=0):
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self.name = name
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self.word_size = word_size
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self.num_words = num_words
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# Don't add a write mask if it is the same size as the data word
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if write_size and write_size==word_size:
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self.write_size = None
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else:
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self.write_size = write_size
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self.num_banks = num_banks
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self.num_spare_rows = num_spare_rows
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self.num_spare_cols = num_spare_cols
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try:
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from tech import array_row_multiple
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self.array_row_multiple = array_row_multiple
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except ImportError:
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self.array_row_multiple = 1
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try:
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from tech import array_col_multiple
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self.array_col_multiple = array_col_multiple
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except ImportError:
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self.array_col_multiple = 1
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if self.write_size:
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self.num_wmasks = int(ceil(self.word_size / self.write_size))
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else:
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self.num_wmasks = 0
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if not self.num_spare_cols:
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self.num_spare_cols = 0
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if not self.num_spare_rows:
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self.num_spare_rows = 0
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# This will get over-written when we determine the organization
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self.words_per_row = words_per_row
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self.compute_sizes()
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sram_config.__init__(self, name, word_size, num_words, write_size=None,
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num_banks=1, words_per_row=None, num_spare_rows=0,
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num_spare_cols=0)
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def setup_multiport_constants(self):
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"""
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