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Rotate via and PEP8 formatting

This commit is contained in:
mrg 2020-03-06 13:39:46 -08:00
parent 23501c7b35
commit c5a1be703c
3 changed files with 11 additions and 11 deletions
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16
compiler/modules/wordline_driver.py
View File

@ -115,7 +115,7 @@ class wordline_driver(design.design):
"vdd", "gnd"]) "vdd", "gnd"])
def place_drivers(self): def place_drivers(self):
nand2_xoffset = 2*self.m1_width + 5*self.m1_space nand2_xoffset = 2 * self.m1_width + 5 * self.m1_space
inv2_xoffset = nand2_xoffset + self.nand2.width inv2_xoffset = nand2_xoffset + self.nand2.width
self.width = inv2_xoffset + self.inv.width self.width = inv2_xoffset + self.inv.width
@ -123,10 +123,10 @@ class wordline_driver(design.design):
for row in range(self.rows): for row in range(self.rows):
if (row % 2): if (row % 2):
y_offset = self.inv.height*(row + 1) y_offset = self.inv.height * (row + 1)
inst_mirror = "MX" inst_mirror = "MX"
else: else:
y_offset = self.inv.height*row y_offset = self.inv.height * row
inst_mirror = "R0" inst_mirror = "R0"
nand2_offset = [nand2_xoffset, y_offset] nand2_offset = [nand2_xoffset, y_offset]
@ -168,8 +168,8 @@ class wordline_driver(design.design):
zr_pos = nand_inst.get_pin("Z").rc() zr_pos = nand_inst.get_pin("Z").rc()
al_pos = inv2_inst.get_pin("A").lc() al_pos = inv2_inst.get_pin("A").lc()
# ensure the bend is in the middle # ensure the bend is in the middle
mid1_pos = vector(0.5*(zr_pos.x+al_pos.x), zr_pos.y) mid1_pos = vector(0.5 * (zr_pos.x + al_pos.x), zr_pos.y)
mid2_pos = vector(0.5*(zr_pos.x+al_pos.x), al_pos.y) mid2_pos = vector(0.5 * (zr_pos.x + al_pos.x), al_pos.y)
self.add_path("m1", [zr_pos, mid1_pos, mid2_pos, al_pos]) self.add_path("m1", [zr_pos, mid1_pos, mid2_pos, al_pos])
# connect the decoder input pin to nand2 B # connect the decoder input pin to nand2 B
@ -180,7 +180,7 @@ class wordline_driver(design.design):
up_or_down = self.m2_space if row % 2 else -self.m2_space up_or_down = self.m2_space if row % 2 else -self.m2_space
input_offset = vector(0, b_pos.y + up_or_down) input_offset = vector(0, b_pos.y + up_or_down)
base_offset = vector(clk_offset.x, input_offset.y) base_offset = vector(clk_offset.x, input_offset.y)
contact_offset = vector(0.5 * self.m2_width + self.m2_space + 0.5 * contact.m1_via.width, 0) contact_offset = vector(0.5 * self.m2_width + self.m2_space + 0.5 * contact.m1_via.width, 0)
mid_via_offset = base_offset + contact_offset mid_via_offset = base_offset + contact_offset
# must under the clk line in M1 # must under the clk line in M1
@ -207,7 +207,7 @@ class wordline_driver(design.design):
end=wl_offset - vector(self.m1_width, 0)) end=wl_offset - vector(self.m1_width, 0))
def determine_wordline_stage_efforts(self, external_cout, inp_is_rise=True): def determine_wordline_stage_efforts(self, external_cout, inp_is_rise=True):
""" """
Follows the clk_buf to a wordline signal adding Follows the clk_buf to a wordline signal adding
each stages stage effort to a list. each stages stage effort to a list.
""" """
@ -224,7 +224,7 @@ class wordline_driver(design.design):
return stage_effort_list return stage_effort_list
def get_wl_en_cin(self): def get_wl_en_cin(self):
""" """
Get the relative capacitance of all Get the relative capacitance of all
the enable connections in the bank the enable connections in the bank
""" """

4
compiler/pgates/pnand2.py
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@ -234,8 +234,8 @@ class pnand2(pgate.pgate):
self.add_layout_pin_rect_center(text="Z", self.add_layout_pin_rect_center(text="Z",
layer="m1", layer="m1",
offset=out_offset, offset=out_offset,
width=contact.m1_via.first_layer_height, width=contact.m1_via.first_layer_width,
height=contact.m1_via.first_layer_width) height=contact.m1_via.first_layer_height)
def analytical_power(self, corner, load): def analytical_power(self, corner, load):
"""Returns dynamic and leakage power. Results in nW""" """Returns dynamic and leakage power. Results in nW"""

2
compiler/pgates/pnand3.py
View File

@ -259,7 +259,7 @@ class pnand3(pgate.pgate):
# In fF # In fF
c_para = spice["min_tx_drain_c"] * (self.nmos_size / parameter["min_tx_size"]) c_para = spice["min_tx_drain_c"] * (self.nmos_size / parameter["min_tx_size"])
transition_prob = 0.1094 transition_prob = 0.1094
return transition_prob *(c_load + c_para) return transition_prob * (c_load + c_para)
def input_load(self): def input_load(self):
"""Return the relative input capacitance of a single input""" """Return the relative input capacitance of a single input"""