Move tests to test Makefile

Makefile

@@ -145,51 +145,6 @@ macros:
 
 .PHONY: macros
 
-TEST_DIR = $(TOP_DIR)/compiler/tests
-TEST_SRCS=$(sort $(notdir $(wildcard $(TEST_DIR)/*_test.py)))
-TEST_DIRS=$(basename $(TEST_SRCS))
-TEST_STAMPS=$(addsuffix .ok,$(TEST_DIRS))
-
-TEST_BROKEN := \
-	sky130_sram_1kbyte_1r1w_8x1024_8 \
-	sky130_sram_1kbyte_1rw_32x256_8 \
-	sky130_sram_2kbyte_1rw_32x512_8 \
-	sky130_sram_4kbyte_1rw_32x1024_8 \
-
-WORKING_TEST_STAMPS=$(filter-out $(addsuffix .ok, (TEST_BROKEN)), $(TEST_STAMPS))
-
-$(TEST_DIRS):
-	@$(MAKE) --no-print-directory $@.ok
-
-tests:
-	@echo "Running the following tests"
-	@for S in $(WORKING_TEST_STAMPS); do echo " - $$S"; done
-	$(MAKE) $(WORKING_TEST_STAMPS)
-.PHONY: tests
-
-%.ok: compiler/tests/%.py
-	@mkdir -p $*
-	@docker run -v $(TOP_DIR):/openram \
-		-v $(SKY130_PDK):$(SKY130_PDK) \
-		-e PDK_ROOT=$(PDK_ROOT) \
-                -e OPENRAM_HOME=/openram/compiler \
-                -e OPENRAM_TECH=/openram/technology \
-		-e OPENRAM_TMP=/openram/$* \
-		--user $(UID):$(GID) \
-                vlsida/openram-ubuntu:latest \
-		python3 -u /openram/compiler/tests/$*.py -v -k && touch $@
-
-.DELETE_ON_ERROR: $(TEST_STAMPS)
-
-regress:
-	@docker run -v $(TOP_DIR):/openram \
-                -e OPENRAM_HOME=/openram/compiler \
-                -e OPENRAM_TECH=/openram/technology \
-		--user $(UID):$(GID) \
-		vlsida/openram-ubuntu:latest \
-                sh -c "python3 -u /openram/compiler/tests/regress.py"
-.PHONY: regress
-
 mount:
 	@docker run -it -v $(TOP_DIR):/openram \
 		-v $(SKY130_PDK):$(SKY130_PDK) \
@@ -201,8 +156,6 @@ mount:
 .PHONY: mount
 
 clean:
-	@rm -rf $(TEST_STAMPS)
-	@rm -rf $(TEST_DIRS)
 	@rm -f *.zip
 .PHONE: clean
 

compiler/Makefile

@@ -104,4 +104,3 @@ clean_model:
 clean:
 	find . -name \*.pyc -exec rm {} \;
 	find . -name \*~ -exec rm {} \;
-

compiler/tests/testutils.py

@@ -35,10 +35,10 @@ class openram_test(unittest.TestCase):
         except:
             debug.error("$OPENRAM_HOME is not properly defined.", 1)
 
-        import shutil
-        zip_file = "{0}/../{1}_{2}".format(OPENRAM_HOME, base_filename, os.getpid())
-        debug.info(0, "Archiving failed temp files {0} to {1}".format(OPTS.openram_temp, zip_file))
-        shutil.make_archive(zip_file, 'zip', OPTS.openram_temp)
+        # import shutil
+        # zip_file = "{0}/../{1}_{2}".format(OPENRAM_HOME, base_filename, os.getpid())
+        # debug.info(0, "Archiving failed temp files {0} to {1}".format(OPTS.openram_temp, zip_file))
+        # shutil.make_archive(zip_file, 'zip', OPTS.openram_temp)
 
         super().fail(msg)
 

technology/freepdk45/tech/freepdk45.lylvs

@@ -209,16 +209,10 @@ connect_global(pwell, "PWELL")
 connect_global(nwell, "NWELL")
 connect_global(bulk, "BULK")
 
-#for pat in %w(pnand*_0 and2_dec_0 port_address* replica_bitcell_array)
-#  connect_explicit(pat, [ "NWELL", "vdd" ])
-#  connect_explicit(pat, [ "BULK", "PWELL", "gnd" ])
-#end
-
-#for pat in %w(XOR* XNOR* TLAT* TINV* TBUF* SDFF* OR* OAI*  NOR* NAND* MUX* LOGIC* INV* HA* FILLCELL*
-#              FA* DLL* DLH* DFF* DFFS* DFFR* DFFRS* CLKGATE*  CLKBUF* BUF* AOI* ANTENNA* AND*)
-#  connect_explicit(pat, [ "NWELL", "VDD" ])
-#  connect_explicit(pat, [ "BULK", "VSS" ])
-#end
+for pat in %w(pnand* and2_dec* port_address* replica_bitcell_array)
+  connect_explicit(pat, [ "NWELL", "vdd" ])
+  connect_explicit(pat, [ "BULK", "PWELL", "gnd" ])
+end
 
 # Actually performs the extraction
 netlist # ... not really required

technology/freepdk45/tech/tech.py

@@ -477,8 +477,11 @@ spice["sa_transconductance"] = (spice["mobility_n"])*spice["cox"]*(parameter["sa
 # Technology Tool Preferences
 ###################################################
 
-drc_name = "calibre"
-lvs_name = "calibre"
-pex_name = "calibre"
+#drc_name = "calibre"
+#lvs_name = "calibre"
+#pex_name = "calibre"
+drc_name = "klayout"
+lvs_name = "klayout"
+pex_name = "klayout"
 
 blackbox_bitcell = False