mirror of https://github.com/VLSIDA/OpenRAM.git
removes debug corners
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@ -10,7 +10,7 @@ num_w_ports = 0
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tech_name = "scn4m_subm"
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process_corners = ["TT"]
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supply_voltages = [5.0]
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temperatures = [25,50]
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temperatures = [25]
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output_path = "temp"
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output_name = "sram_1rw_1r_{0}_{1}_{2}".format(word_size,num_words,tech_name)
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