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Update documentation for library

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Eren Dogan
2022-11-11 16:16:38 -08:00
parent e821b4a75e
commit be7c21ab64
14 changed files with 187 additions and 131 deletions
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docs/source/library_cells.md
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@@ -7,12 +7,12 @@ This page of the documentation explains the library cells of OpenRAM.
## Table of Contents
1. [Required Hard/Custom Cells](#required-hardcustom-cells)
2. [Bitcell(s)](#bitcells)
3. [Multiport Bitcells](#multiport-bitcells)
4. [Parameterized Bitcell](#parameterized-bitcell)
5. [Sense Amplifier](#sense-amplifier)
6. [DFF](#dff)
7. [Tristate/Write Driver](#tristatewrite-driver)
1. [Bitcell(s)](#bitcells)
1. [Multiport Bitcells](#multiport-bitcells)
1. [Parameterized Bitcell](#parameterized-bitcell)
1. [Sense Amplifier](#sense-amplifier)
1. [DFF](#dff)
1. [Tristate/Write Driver](#tristatewrite-driver)
@@ -93,4 +93,4 @@ This page of the documentation explains the library cells of OpenRAM.
## Tristate/Write Driver
* Tristate is used for multi-bank implementations
* Write driver drives the data onto the bitlines
* Both of these are currently library cells, but plans are to make them dynamically generated (`ptristate.py` and `pwrite_driver.py`)
* Both of these are currently library cells, but plans are to make them dynamically generated (`ptristate.py` and `pwrite_driver.py`)