mirror of https://github.com/VLSIDA/OpenRAM.git
Edits to functional simulation.
Use correct .TRAN with max timestep. Seed functional sim with a 3 writes to start for more read addresses. Move formatting code to simulation module to share.
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mrg
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278c40f4b7
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@ -141,23 +141,25 @@ class functional(simulation):
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comment = self.gen_cycle_comment("noop", "0" * self.word_size, "0" * self.addr_size, "0" * self.num_wmasks, 0, self.t_current)
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self.add_noop_all_ports(comment)
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# 1. Write all the write ports first to seed a bunch of locations.
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for port in self.write_ports:
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addr = self.gen_addr()
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(word, spare) = self.gen_data()
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combined_word = self.combine_word(spare, word)
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comment = self.gen_cycle_comment("write", combined_word, addr, "1" * self.num_wmasks, port, self.t_current)
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self.add_write_one_port(comment, addr, spare + word, "1" * self.num_wmasks, port)
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self.stored_words[addr] = word
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self.stored_spares[addr[:self.addr_spare_index]] = spare
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# All other read-only ports are noops.
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for port in self.read_ports:
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if port not in self.write_ports:
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self.add_noop_one_port(port)
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self.cycle_times.append(self.t_current)
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self.t_current += self.period
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self.check_lengths()
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# 1. Write all the write ports 2x to seed a bunch of locations.
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for i in range(3):
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for port in self.write_ports:
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addr = self.gen_addr()
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(word, spare) = self.gen_data()
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combined_word = self.combine_word(spare, word)
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comment = self.gen_cycle_comment("write", combined_word, addr, "1" * self.num_wmasks, port, self.t_current)
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self.add_write_one_port(comment, addr, spare + word, "1" * self.num_wmasks, port)
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self.stored_words[addr] = word
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self.stored_spares[addr[:self.addr_spare_index]] = spare
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# All other read-only ports are noops.
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for port in self.read_ports:
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if port not in self.write_ports:
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self.add_noop_one_port(port)
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self.cycle_times.append(self.t_current)
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self.t_current += self.period
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self.check_lengths()
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# 2. Read at least once. For multiport, it is important that one
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# read cycle uses all RW and R port to read from the same
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@ -297,38 +299,6 @@ class functional(simulation):
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self.read_results.append([sp_read_value, dout_port, eo_period, cycle])
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return (1, "SUCCESS")
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def combine_word(self, spare, word):
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if len(spare) > 0:
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return spare + "+" + word
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return word
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def format_value(self, value):
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""" Format in better readable manner """
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def delineate(word):
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# Create list of chars in reverse order
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split_word = list(reversed([x for x in word]))
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# Add underscore every 4th char
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split_word2 = [x + '_' * (n != 0 and n % 4 == 0) for n, x in enumerate(split_word)]
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# Join the word unreversed back together
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new_word = ''.join(reversed(split_word2))
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return(new_word)
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# Split extra cols
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if self.num_spare_cols > 0:
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vals = value[self.num_spare_cols:]
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spare_vals = value[:self.num_spare_cols]
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else:
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vals = value
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spare_vals = ""
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# Insert underscores
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vals = delineate(vals)
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spare_vals = delineate(spare_vals)
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return self.combine_word(spare_vals, vals)
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def check_stim_results(self):
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for i in range(len(self.read_check)):
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if self.read_check[i][0] != self.read_results[i][0]:
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@ -372,10 +342,12 @@ class functional(simulation):
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def gen_data(self):
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""" Generates a random word to write. """
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random_value = random.randint(0, self.max_data)
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# Don't use 0 or max value
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random_value = random.randint(1, self.max_data - 1)
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data_bits = binary_repr(random_value, self.word_size)
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if self.num_spare_cols>0:
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random_value = random.randint(0, self.max_col_data)
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# Don't use 0 or max value
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random_value = random.randint(1, self.max_col_data - 1)
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spare_bits = binary_repr(random_value, self.num_spare_cols)
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else:
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spare_bits = ""
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@ -498,7 +470,7 @@ class functional(simulation):
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for (word, dout_port, eo_period, cycle) in self.read_check:
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t_initial = eo_period
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t_final = eo_period
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t_final = eo_period + 0.01 * self.period
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num_bits = self.word_size + self.num_spare_cols
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for bit in range(num_bits):
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signal_name = "{0}_{1}".format(dout_port, bit)
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@ -372,6 +372,38 @@ class simulation():
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time_spacing,
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comment))
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def combine_word(self, spare, word):
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if len(spare) > 0:
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return spare + "+" + word
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return word
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def format_value(self, value):
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""" Format in better readable manner """
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def delineate(word):
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# Create list of chars in reverse order
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split_word = list(reversed([x for x in word]))
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# Add underscore every 4th char
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split_word2 = [x + '_' * (n != 0 and n % 4 == 0) for n, x in enumerate(split_word)]
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# Join the word unreversed back together
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new_word = ''.join(reversed(split_word2))
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return(new_word)
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# Split extra cols
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if self.num_spare_cols > 0:
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vals = value[self.num_spare_cols:]
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spare_vals = value[:self.num_spare_cols]
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else:
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vals = value
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spare_vals = ""
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# Insert underscores
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vals = delineate(vals)
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spare_vals = delineate(spare_vals)
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return self.combine_word(spare_vals, vals)
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def gen_cycle_comment(self, op, word, addr, wmask, port, t_current):
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if op == "noop":
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str = "\tIdle during cycle {0} ({1}ns - {2}ns)"
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@ -222,7 +222,7 @@ class stimuli():
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def gen_meas_value(self, meas_name, dout, t_initial, t_final):
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measure_string=".meas tran {0} FIND v({1}) AT={2}n\n\n".format(meas_name.lower(), dout, (t_initial + t_final) / 2)
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# measure_string=".meas tran {0} AVG v({1}) FROM={2}n TO={3}n\n\n".format(meas_name.lower(), dout, t_initial, t_final)
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#measure_string=".meas tran {0} AVG v({1}) FROM={2}n TO={3}n\n\n".format(meas_name.lower(), dout, t_initial, t_final)
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self.sf.write(measure_string)
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def write_control(self, end_time, runlvl=4):
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@ -237,12 +237,13 @@ class stimuli():
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reltol = 0.005 # 0.5%
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else:
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reltol = 0.001 # 0.1%
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timestep = 10 # ps, was 5ps but ngspice was complaining the timestep was too small in certain tests.
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timestep = 10 # ps
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if OPTS.spice_name == "ngspice":
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self.sf.write(".TEMP {}\n".format(self.temperature))
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# UIC is needed for ngspice to converge
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self.sf.write(".TRAN {0}p {1}n UIC\n".format(timestep, end_time))
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# Format: .tran tstep tstop < tstart < tmax >>
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self.sf.write(".TRAN {0}p {1}n 0n {0}p UIC\n".format(timestep, end_time))
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# ngspice sometimes has convergence problems if not using gear method
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# which is more accurate, but slower than the default trapezoid method
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# Do not remove this or it may not converge due to some "pa_00" nodes
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@ -268,7 +269,8 @@ class stimuli():
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self.sf.write("simulator lang=spice\n")
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elif OPTS.spice_name in ["hspice", "xa"]:
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self.sf.write(".TEMP {}\n".format(self.temperature))
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self.sf.write(".TRAN {0}p {1}n UIC\n".format(timestep, end_time))
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# Format: .tran tstep tstop < tstart < tmax >>
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self.sf.write(".TRAN {0}p {1}n 0n {0}p UIC\n".format(timestep, end_time))
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self.sf.write(".OPTIONS POST=1 RUNLVL={0} PROBE\n".format(runlvl))
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self.sf.write(".OPTIONS PSF=1 \n")
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self.sf.write(".OPTIONS HIER_DELIM=1 \n")
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@ -276,7 +278,9 @@ class stimuli():
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self.sf.write(".OPTIONS DEVICE TEMP={}\n".format(self.temperature))
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self.sf.write(".OPTIONS MEASURE MEASFAIL=1\n")
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self.sf.write(".OPTIONS LINSOL type=klu\n")
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self.sf.write(".TRAN {0}p {1}n\n".format(timestep, end_time))
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self.sf.write(".OPTIONS TIMEINT RELTOL=1e-6 ABSTOL=1e-10 method=gear minorder=2\n")
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# Format: .TRAN <initial step> <final time> <start time> <step ceiling>
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self.sf.write(".TRAN {0}p {1}n 0n {0}p\n".format(timestep, end_time))
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elif OPTS.spice_name:
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debug.error("Unkown spice simulator {}".format(OPTS.spice_name), -1)
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