mirror of https://github.com/VLSIDA/OpenRAM.git
Move control output via inside module instead of perimeter
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@ -802,15 +802,16 @@ class control_logic(design.design):
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""" Create an output pin on the right side from the pin of a given instance. """
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out_pin = inst.get_pin(pin_name)
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right_pos = out_pin.center() + vector(self.width - out_pin.cx(), 0)
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out_pos = out_pin.center()
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right_pos = out_pos + vector(self.width - out_pin.cx(), 0)
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self.add_path(out_pin.layer, [out_pin.center(), right_pos])
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self.add_via_stack_center(from_layer=out_pin.layer,
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to_layer="m1",
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offset=right_pos)
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self.add_layout_pin_rect_center(text=out_name,
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layer="m1",
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offset=right_pos)
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to_layer="m2",
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offset=out_pos)
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self.add_layout_pin_segment_center(text=out_name,
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layer="m2",
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start=out_pos,
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end=right_pos)
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def route_supply(self):
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""" Add vdd and gnd to the instance cells """
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