mirror of https://github.com/VLSIDA/OpenRAM.git
made multi-port changes to sram. This commit will allow all levels of openram to pass unit tests
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@ -76,7 +76,7 @@ class sram_1bank(sram_base):
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for i in range(self.word_size):
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for i in range(self.word_size):
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dout_name = "dout0[{}]".format(i)
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dout_name = "dout0[{}]".format(i)
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self.copy_layout_pin(self.bank_inst, dout_name, dout_name.upper())
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self.copy_layout_pin(self.bank_inst, dout_name, "DOUT[{}]".format(i))
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# Lower address bits
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# Lower address bits
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for i in range(self.col_addr_size):
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for i in range(self.col_addr_size):
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