mirror of https://github.com/VLSIDA/OpenRAM.git
PEP8 cleanup
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@ -7,6 +7,7 @@
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#
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from globals import OPTS
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class _pins:
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def __init__(self, pin_dict):
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# make the pins elements of the class to allow "." access.
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@ -14,6 +15,7 @@ class _pins:
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for k, v in pin_dict.items():
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self.__dict__[k] = v
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class _cell:
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def __init__(self, pin_dict):
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pin_dict.update(self._default_power_pins())
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@ -24,13 +26,16 @@ class _cell:
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return self._pins
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def _default_power_pins(self):
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return { 'vdd' : 'vdd', 'gnd' : 'gnd' }
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return {'vdd': 'vdd',
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'gnd': 'gnd'}
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class _mirror_axis:
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def __init__(self, x, y):
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self.x = x
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self.y = y
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class _bitcell:
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def __init__(self, mirror, cell_s8_6t, cell_6t, cell_1rw1r, cell_1w1r):
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self.mirror = mirror
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@ -94,21 +99,25 @@ class _dff:
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self.custom_type_list = custom_type_list
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self.clk_pin = clk_pin
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class _dff_buff:
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def __init__(self, use_custom_ports, custom_buff_ports, add_body_contacts):
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self.use_custom_ports = use_custom_ports
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self.buf_ports = custom_buff_ports
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self.add_body_contacts = add_body_contacts
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class _dff_buff_array:
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def __init__(self, use_custom_ports, add_body_contacts):
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self.use_custom_ports = use_custom_ports
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self.add_body_contacts = add_body_contacts
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class _bitcell_array:
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def __init__(self, use_custom_cell_arrangement):
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self.use_custom_cell_arrangement = use_custom_cell_arrangement
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class cell_properties():
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"""
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This contains meta information about the custom designed cells. For
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