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PEP8 cleanup

This commit is contained in:
mrg 2020-10-26 13:13:38 -07:00
parent cae41c63f0
commit b45a7902c0
1 changed files with 45 additions and 36 deletions
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81
compiler/base/custom_cell_properties.py
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@ -7,13 +7,15 @@
# #
from globals import OPTS from globals import OPTS
class _pins: class _pins:
def __init__(self, pin_dict): def __init__(self, pin_dict):
# make the pins elements of the class to allow "." access. # make the pins elements of the class to allow "." access.
# For example: props.bitcell.cell_6t.pin.bl = "foobar" # For example: props.bitcell.cell_6t.pin.bl = "foobar"
for k,v in pin_dict.items(): for k, v in pin_dict.items():
self.__dict__[k] = v self.__dict__[k] = v
class _cell: class _cell:
def __init__(self, pin_dict): def __init__(self, pin_dict):
pin_dict.update(self._default_power_pins()) pin_dict.update(self._default_power_pins())
@ -24,13 +26,16 @@ class _cell:
return self._pins return self._pins
def _default_power_pins(self): def _default_power_pins(self):
return { 'vdd' : 'vdd', 'gnd' : 'gnd' } return {'vdd': 'vdd',
'gnd': 'gnd'}
class _mirror_axis: class _mirror_axis:
def __init__(self, x, y): def __init__(self, x, y):
self.x = x self.x = x
self.y = y self.y = y
class _bitcell: class _bitcell:
def __init__(self, mirror, cell_s8_6t, cell_6t, cell_1rw1r, cell_1w1r): def __init__(self, mirror, cell_s8_6t, cell_6t, cell_1rw1r, cell_1w1r):
self.mirror = mirror self.mirror = mirror
@ -42,27 +47,27 @@ class _bitcell:
def _default(): def _default():
axis = _mirror_axis(True, False) axis = _mirror_axis(True, False)
cell_s8_6t = _cell({'bl' : 'bl', cell_s8_6t = _cell({'bl': 'bl',
'br' : 'br', 'br': 'br',
'wl': 'wl'}) 'wl': 'wl'})
cell_6t = _cell({'bl' : 'bl', cell_6t = _cell({'bl': 'bl',
'br' : 'br', 'br': 'br',
'wl' : 'wl'}) 'wl': 'wl'})
cell_1rw1r = _cell({'bl0' : 'bl0', cell_1rw1r = _cell({'bl0': 'bl0',
'br0' : 'br0', 'br0': 'br0',
'bl1' : 'bl1', 'bl1': 'bl1',
'br1' : 'br1', 'br1': 'br1',
'wl0' : 'wl0', 'wl0': 'wl0',
'wl1' : 'wl1'}) 'wl1': 'wl1'})
cell_1w1r = _cell({'bl0' : 'bl0', cell_1w1r = _cell({'bl0': 'bl0',
'br0' : 'br0', 'br0': 'br0',
'bl1' : 'bl1', 'bl1': 'bl1',
'br1' : 'br1', 'br1': 'br1',
'wl0' : 'wl0', 'wl0': 'wl0',
'wl1' : 'wl1'}) 'wl1': 'wl1'})
return _bitcell(cell_s8_6t=cell_s8_6t, return _bitcell(cell_s8_6t=cell_s8_6t,
cell_6t=cell_6t, cell_6t=cell_6t,
@ -94,21 +99,25 @@ class _dff:
self.custom_type_list = custom_type_list self.custom_type_list = custom_type_list
self.clk_pin = clk_pin self.clk_pin = clk_pin
class _dff_buff: class _dff_buff:
def __init__(self, use_custom_ports, custom_buff_ports, add_body_contacts): def __init__(self, use_custom_ports, custom_buff_ports, add_body_contacts):
self.use_custom_ports = use_custom_ports self.use_custom_ports = use_custom_ports
self.buf_ports = custom_buff_ports self.buf_ports = custom_buff_ports
self.add_body_contacts = add_body_contacts self.add_body_contacts = add_body_contacts
class _dff_buff_array: class _dff_buff_array:
def __init__(self, use_custom_ports, add_body_contacts): def __init__(self, use_custom_ports, add_body_contacts):
self.use_custom_ports = use_custom_ports self.use_custom_ports = use_custom_ports
self.add_body_contacts = add_body_contacts self.add_body_contacts = add_body_contacts
class _bitcell_array: class _bitcell_array:
def __init__(self, use_custom_cell_arrangement): def __init__(self, use_custom_cell_arrangement):
self.use_custom_cell_arrangement = use_custom_cell_arrangement self.use_custom_cell_arrangement = use_custom_cell_arrangement
class cell_properties(): class cell_properties():
""" """
This contains meta information about the custom designed cells. For This contains meta information about the custom designed cells. For
@ -120,29 +129,29 @@ class cell_properties():
self._bitcell = _bitcell._default() self._bitcell = _bitcell._default()
self._dff = _dff(use_custom_ports = False, self._dff = _dff(use_custom_ports=False,
custom_port_list = ["D", "Q", "clk", "vdd", "gnd"], custom_port_list=["D", "Q", "clk", "vdd", "gnd"],
custom_type_list = ["INPUT", "OUTPUT", "INPUT", "POWER", "GROUND"], custom_type_list=["INPUT", "OUTPUT", "INPUT", "POWER", "GROUND"],
clk_pin= "clk") clk_pin="clk")
self._dff_buff = _dff_buff(use_custom_ports = False, self._dff_buff = _dff_buff(use_custom_ports=False,
custom_buff_ports = ["D", "qint", "clk", "vdd", "gnd"], custom_buff_ports=["D", "qint", "clk", "vdd", "gnd"],
add_body_contacts = False) add_body_contacts=False)
self._dff_buff_array = _dff_buff_array(use_custom_ports = False, self._dff_buff_array = _dff_buff_array(use_custom_ports=False,
add_body_contacts = False) add_body_contacts=False)
self._write_driver = _cell({'din': 'din', self._write_driver = _cell({'din': 'din',
'bl' : 'bl', 'bl': 'bl',
'br' : 'br', 'br': 'br',
'en' : 'en'}) 'en': 'en'})
self._sense_amp = _cell({'bl' : 'bl', self._sense_amp = _cell({'bl': 'bl',
'br' : 'br', 'br': 'br',
'dout' : 'dout', 'dout': 'dout',
'en' : 'en'}) 'en': 'en'})
self._bitcell_array = _bitcell_array(use_custom_cell_arrangement = []) self._bitcell_array = _bitcell_array(use_custom_cell_arrangement=[])
@property @property
def bitcell(self): def bitcell(self):