mirror of https://github.com/VLSIDA/OpenRAM.git
Fix derouting wires in the gridless router
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parent
9c66473cc9
commit
b3e1a163d0
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@ -98,7 +98,7 @@ class graph:
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return False
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return False
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def is_node_blocked(self, node, pin_safe=True):
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def is_node_blocked(self, node):
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""" Return if a node is blocked by a blockage. """
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""" Return if a node is blocked by a blockage. """
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p = node.center
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p = node.center
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@ -150,7 +150,7 @@ class graph:
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xdiff = closest(p.x, xs)
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xdiff = closest(p.x, xs)
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ydiff = closest(p.y, ys)
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ydiff = closest(p.y, ys)
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if xdiff == 0 and ydiff == 0:
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if xdiff == 0 and ydiff == 0:
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if pin_safe and blockage in [self.source, self.target]:
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if blockage in [self.source, self.target]:
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return False
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return False
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elif xdiff < spacing and ydiff < spacing:
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elif xdiff < spacing and ydiff < spacing:
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blocked = True
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blocked = True
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@ -162,7 +162,7 @@ class graph:
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# If the nodes are blocked by a blockage other than a via
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# If the nodes are blocked by a blockage other than a via
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for node in nodes:
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for node in nodes:
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if self.is_node_blocked(node, pin_safe=False):
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if self.is_node_blocked(node):
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return True
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return True
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# Skip if no via is present
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# Skip if no via is present
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