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Merge branch 'dev' into automated_analytical_model

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This commit is contained in:
Hunter Nichols
2021-05-26 18:42:24 -07:00
parent a53c6c51ed 61221ff4fa
commit b3bcf48d2e
14 changed files with 386 additions and 116 deletions
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compiler/characterizer/lib.py
+16 -6
View File
@@ -15,6 +15,7 @@ from .charutils import *
import tech
import numpy as np
from globals import OPTS
from tech import spice
class lib:
@@ -22,6 +23,15 @@ class lib:
def __init__(self, out_dir, sram, sp_file, use_model=OPTS.analytical_delay):
try:
self.vdd_name = spice["power"]
except KeyError:
self.vdd_name = "vdd"
try:
self.gnd_name = spice["ground"]
except KeyError:
self.gnd_name = "gnd"
self.out_dir = out_dir
self.sram = sram
self.sp_file = sp_file
@@ -274,8 +284,8 @@ class lib:
self.lib.write(" default_max_fanout : 4.0 ;\n")
self.lib.write(" default_connection_class : universal ;\n\n")
self.lib.write(" voltage_map ( VDD, {} );\n".format(self.voltage))
self.lib.write(" voltage_map ( GND, 0 );\n\n")
self.lib.write(" voltage_map ( {0}, {1} );\n".format(self.vdd_name.upper(), self.voltage))
self.lib.write(" voltage_map ( {0}, 0 );\n\n".format(self.gnd_name.upper()))
def create_list(self,values):
""" Helper function to create quoted, line wrapped list """
@@ -607,12 +617,12 @@ class lib:
self.lib.write(" }\n")
def write_pg_pin(self):
self.lib.write(" pg_pin(vdd) {\n")
self.lib.write(" voltage_name : VDD;\n")
self.lib.write(" pg_pin({0}) ".format(self.vdd_name) + "{\n")
self.lib.write(" voltage_name : {};\n".format(self.vdd_name.upper()))
self.lib.write(" pg_type : primary_power;\n")
self.lib.write(" }\n\n")
self.lib.write(" pg_pin(gnd) {\n")
self.lib.write(" voltage_name : GND;\n")
self.lib.write(" pg_pin({0}) ".format(self.gnd_name) + "{\n")
self.lib.write(" voltage_name : {};\n".format(self.gnd_name.upper()))
self.lib.write(" pg_type : primary_ground;\n")
self.lib.write(" }\n\n")
compiler/characterizer/stimuli.py
+1 -1
View File
@@ -22,7 +22,7 @@ from globals import OPTS
class stimuli():
""" Class for providing stimuli functions """
def __init__(self, stim_file, corner):
def __init__(self, stim_file, corner):
self.vdd_name = "vdd"
self.gnd_name = "gnd"
self.pmos_name = tech.spice["pmos"]