mirror of https://github.com/VLSIDA/OpenRAM.git
Remove redundant pins in pin_group constructor. Clean up some code and comments.
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@ -149,7 +149,14 @@ class pin_layout:
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return False
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return False
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return True
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return True
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def contained_by_any(self, shape_list):
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""" Checks if shape is contained by any in the list """
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for shape in shape_list:
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if shape.contains(self):
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return True
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return False
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def overlaps(self, other):
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def overlaps(self, other):
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""" Check if a shape overlaps with a rectangle """
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""" Check if a shape overlaps with a rectangle """
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@ -10,21 +10,22 @@ class pin_group:
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A class to represent a group of rectangular design pin.
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A class to represent a group of rectangular design pin.
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It requires a router to define the track widths and blockages which
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It requires a router to define the track widths and blockages which
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determine how pin shapes get mapped to tracks.
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determine how pin shapes get mapped to tracks.
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It is initially constructed with a single set of (touching) pins.
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"""
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"""
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def __init__(self, name, pin_shapes, router):
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def __init__(self, name, pin_set, router):
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self.name = name
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self.name = name
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# Flag for when it is routed
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# Flag for when it is routed
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self.routed = False
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self.routed = False
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# Flag for when it is enclosed
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# Flag for when it is enclosed
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self.enclosed = False
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self.enclosed = False
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# Remove any redundant pins (i.e. contained in other pins)
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irredundant_pin_set = self.remove_redundant_shapes(list(pin_set))
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# This is a list because we can have a pin group of disconnected sets of pins
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# This is a list because we can have a pin group of disconnected sets of pins
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# and these are represented by separate lists
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# and these are represented by separate lists
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if pin_shapes:
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self.pins = [set(irredundant_pin_set)]
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self.pins = [pin_shapes]
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else:
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self.pins = []
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self.router = router
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self.router = router
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# These are the corresponding pin grids for each pin group.
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# These are the corresponding pin grids for each pin group.
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self.grids = set()
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self.grids = set()
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@ -35,6 +36,9 @@ class pin_group:
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# These are blockages for other nets but unblocked for routing this group.
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# These are blockages for other nets but unblocked for routing this group.
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self.blockages = set()
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self.blockages = set()
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# This is a set of pin_layout shapes to cover the grids
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self.enclosures = set()
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def __str__(self):
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def __str__(self):
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""" override print function output """
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""" override print function output """
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total_string = "(pg {} ".format(self.name)
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total_string = "(pg {} ".format(self.name)
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@ -90,6 +94,7 @@ class pin_group:
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def remove_redundant_shapes(self, pin_list):
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def remove_redundant_shapes(self, pin_list):
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"""
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"""
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Remove any pin layout that is contained within another.
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Remove any pin layout that is contained within another.
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Returns a new list without modifying pin_list.
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"""
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"""
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local_debug = False
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local_debug = False
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if local_debug:
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if local_debug:
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@ -144,7 +149,11 @@ class pin_group:
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enclosure = self.router.compute_pin_enclosure(ll, ur, ll.z)
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enclosure = self.router.compute_pin_enclosure(ll, ur, ll.z)
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pin_list.append(enclosure)
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pin_list.append(enclosure)
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return pin_list
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# Now simplify the enclosure list
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new_pin_list = self.remove_redundant_shapes(pin_list)
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return new_pin_list
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def compute_connector(self, pin, enclosure):
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def compute_connector(self, pin, enclosure):
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"""
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"""
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@ -445,13 +454,15 @@ class pin_group:
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self.enclosed = True
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self.enclosed = True
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# Compute the enclosure pin_layout list of the set of tracks
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# Compute the enclosure pin_layout list of the set of tracks
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redundant_enclosures = self.compute_enclosures()
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self.enclosures = self.compute_enclosures()
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# Now simplify the enclosure list
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self.enclosures = self.remove_redundant_shapes(redundant_enclosures)
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for pin_list in self.pins:
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for pin_list in self.pins:
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for pin in pin_list:
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for pin in pin_list:
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# If it is contained, it won't need a connector
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if pin.contained_by_any(self.enclosures):
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continue
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left_connector = self.find_left_connector(pin, self.enclosures)
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left_connector = self.find_left_connector(pin, self.enclosures)
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right_connector = self.find_right_connector(pin, self.enclosures)
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right_connector = self.find_right_connector(pin, self.enclosures)
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above_connector = self.find_above_connector(pin, self.enclosures)
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above_connector = self.find_above_connector(pin, self.enclosures)
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@ -553,9 +564,11 @@ class pin_group:
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debug.info(2," Converting {0}".format(pin))
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debug.info(2," Converting {0}".format(pin))
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# Determine which tracks the pin overlaps
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# Determine which tracks the pin overlaps
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pin_in_tracks=router.convert_pin_to_tracks(self.name, pin)
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pin_in_tracks=router.convert_pin_to_tracks(self.name, pin)
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pin_set.update(pin_in_tracks)
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pin_set.update(pin_in_tracks)
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# Blockages will be a super-set of pins since it uses the inflated pin shape.
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# Blockages will be a super-set of pins since it uses the inflated pin shape.
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blockage_in_tracks = router.convert_blockage(pin)
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blockage_in_tracks = router.convert_blockage(pin)
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blockage_set.update(blockage_in_tracks)
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blockage_set.update(blockage_in_tracks)
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# If we have a blockage, we must remove the grids
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# If we have a blockage, we must remove the grids
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@ -98,11 +98,16 @@ class router(router_tech):
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pin_set = set()
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pin_set = set()
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for shape in shape_list:
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for shape in shape_list:
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(name,layer,boundary)=shape
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(name,layer,boundary)=shape
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rect = [vector(boundary[0],boundary[1]),vector(boundary[2],boundary[3])]
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# GDSMill boundaries are in (left, bottom, right, top) order
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# so repack and snap to the grid
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ll = vector(boundary[0],boundary[1]).snap_to_grid()
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ur = vector(boundary[2],boundary[3]).snap_to_grid()
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rect = [ll,ur]
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pin = pin_layout(pin_name, rect, layer)
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pin = pin_layout(pin_name, rect, layer)
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pin_set.add(pin)
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pin_set.add(pin)
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debug.check(len(pin_set)>0,"Did not find any pin shapes for {0}.".format(str(pin_name)))
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debug.check(len(pin_set)>0,"Did not find any pin shapes for {0}.".format(str(pin_name)))
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self.pins[pin_name] = pin_set
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self.pins[pin_name] = pin_set
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self.all_pins.update(pin_set)
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self.all_pins.update(pin_set)
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@ -411,7 +416,7 @@ class router(router_tech):
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p.set_blocked(value)
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p.set_blocked(value)
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def get_blockage_tracks(self, ll, ur, z):
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def get_blockage_tracks(self, ll, ur, z):
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debug.info(4,"Converting blockage ll={0} ur={1} z={2}".format(str(ll),str(ur),z))
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debug.info(3,"Converting blockage ll={0} ur={1} z={2}".format(str(ll),str(ur),z))
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block_list = []
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block_list = []
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for x in range(int(ll[0]),int(ur[0])+1):
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for x in range(int(ll[0]),int(ur[0])+1):
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@ -684,7 +689,7 @@ class router(router_tech):
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reduced_classes = combine_classes(equiv_classes)
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reduced_classes = combine_classes(equiv_classes)
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if local_debug:
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if local_debug:
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debug.info(0,"FINAL ",reduced_classes)
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debug.info(0,"FINAL ",reduced_classes)
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self.pin_groups[pin_name] = [pin_group(name=pin_name, pin_shapes=x, router=self) for x in reduced_classes]
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self.pin_groups[pin_name] = [pin_group(name=pin_name, pin_set=x, router=self) for x in reduced_classes]
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def convert_pins(self, pin_name):
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def convert_pins(self, pin_name):
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"""
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"""
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@ -169,7 +169,7 @@ class supply_router(router):
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if not new_set:
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if not new_set:
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new_set = self.recurse_simple_overlap_enclosure(pin_name, start_set, direction.WEST)
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new_set = self.recurse_simple_overlap_enclosure(pin_name, start_set, direction.WEST)
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pg = pin_group(name=pin_name, pin_shapes=[], router=self)
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pg = pin_group(name=pin_name, pin_set=[], router=self)
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pg.grids=new_set
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pg.grids=new_set
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enclosure_list = pg.compute_enclosures()
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enclosure_list = pg.compute_enclosures()
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for pin in enclosure_list:
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for pin in enclosure_list:
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