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https://github.com/VLSIDA/OpenRAM.git
synced 2026-08-29 17:39:02 +02:00
Reimplement off grid pins.
Long pins aren't accessed on end pins anymore. Fix problem with multiple non-enclosed space causing blockages. Add partial pin offgrid enclosure algorithm.
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@@ -331,6 +331,7 @@ class replica_bitcell_array(bitcell_base_array):
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self.translate_all(array_offset.scale(-1, -1))
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# Add extra width on the left and right for the unused WLs
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self.width = self.dummy_col_insts[1].rx() + self.unused_offset.x
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self.height = self.dummy_row_insts[1].uy()
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@@ -340,6 +341,12 @@ class replica_bitcell_array(bitcell_base_array):
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self.route_unused_wordlines()
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lower_left = self.find_lowest_coords()
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upper_right = self.find_highest_coords()
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self.width = upper_right.x - lower_left.x
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self.height = upper_right.y - lower_left.y
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self.translate_all(lower_left)
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self.add_boundary()
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self.DRC_LVS()
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@@ -356,6 +363,18 @@ class replica_bitcell_array(bitcell_base_array):
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def get_main_array_right(self):
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return self.bitcell_array_inst.rx()
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def get_replica_top(self):
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return max([x.uy() for x in self.replica_col_insts if x] + [self.get_main_array_top()])
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def get_replica_bottom(self):
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return min([x.by() for x in self.replica_col_insts if x] + [self.get_main_array_bottom()])
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def get_replica_left(self):
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return min([x.lx() for x in self.replica_col_insts if x] + [self.get_main_array_left()])
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def get_replica_right(self):
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return min([x.rx() for x in self.replica_col_insts if x] + [self.get_main_array_right()])
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def get_column_offsets(self):
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"""
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Return an array of the x offsets of all the regular bits
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@@ -567,14 +586,15 @@ class replica_bitcell_array(bitcell_base_array):
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top_loc = vector(self.width + offset_multiple * self.vertical_pitch, self.height)
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layer = self.supply_stack[2]
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self.add_path(layer, [bot_loc, top_loc])
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self.add_layout_pin_rect_center(text=name,
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layer=layer,
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offset=top_loc)
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self.add_layout_pin_rect_center(text=name,
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layer=layer,
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offset=bot_loc)
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# self.add_layout_pin_rect_ends(text=name,
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# layer=layer,
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# start=bot_loc,
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# end=top_loc)
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self.add_layout_pin_segment_center(text=name,
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layer=layer,
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start=bot_loc,
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end=top_loc)
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return (bot_loc, top_loc)
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@@ -590,14 +610,15 @@ class replica_bitcell_array(bitcell_base_array):
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right_loc = vector(self.width, self.height + offset_multiple * self.horizontal_pitch)
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layer = self.supply_stack[0]
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self.add_path(layer, [left_loc, right_loc])
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self.add_layout_pin_rect_center(text=name,
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layer=layer,
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offset=left_loc)
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self.add_layout_pin_rect_center(text=name,
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layer=layer,
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offset=right_loc)
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# self.add_layout_pin_rect_ends(text=name,
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# layer=layer,
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# start=left_loc,
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# end=right_loc)
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self.add_layout_pin_segment_center(text=name,
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layer=layer,
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start=left_loc,
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end=right_loc)
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return (left_loc, right_loc)
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