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update to sense amp and write driver modules

This commit is contained in:
Joey Kunzler 2020-03-30 20:00:32 -07:00
parent 9907daaffa
commit b0d2946c80
3 changed files with 33 additions and 28 deletions
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11
compiler/modules/sense_amp_array.py
View File

@ -141,18 +141,18 @@ class sense_amp_array(design.design):
dout_pin = inst.get_pin(inst.mod.dout_name)
self.add_layout_pin(text=self.get_bl_name() + "_{0}".format(i),
layer="m2",
layer=bl_pin.layer,
offset=bl_pin.ll(),
width=bl_pin.width(),
height=bl_pin.height())
self.add_layout_pin(text=self.get_br_name() + "_{0}".format(i),
layer="m2",
layer=br_pin.layer,
offset=br_pin.ll(),
width=br_pin.width(),
height=br_pin.height())
self.add_layout_pin(text=self.data_name + "_{0}".format(i),
layer="m2",
layer=dout_pin.layer,
offset=dout_pin.ll(),
width=dout_pin.width(),
height=dout_pin.height())
@ -160,12 +160,13 @@ class sense_amp_array(design.design):
def route_rails(self):
# add sclk rail across entire array
sclk = self.amp.get_pin(self.amp.en_name)
sclk_offset = self.amp.get_pin(self.amp.en_name).ll().scale(0,1)
self.add_layout_pin(text=self.en_name,
layer="m1",
layer=sclk.layer,
offset=sclk_offset,
width=self.width,
height=drc("minwidth_m1"))
height=drc("minwidth_" + sclk.layer))
def input_load(self):
return self.amp.input_load()

6
compiler/modules/write_driver_array.py
View File

@ -145,20 +145,20 @@ class write_driver_array(design.design):
inst = self.driver_insts[i]
din_pin = inst.get_pin(inst.mod.din_name)
self.add_layout_pin(text=self.data_name + "_{0}".format(i),
layer="m2",
layer=din_pin.layer,
offset=din_pin.ll(),
width=din_pin.width(),
height=din_pin.height())
bl_pin = inst.get_pin(inst.mod.get_bl_names())
self.add_layout_pin(text=self.get_bl_name() + "_{0}".format(i),
layer="m2",
layer=bl_pin.layer,
offset=bl_pin.ll(),
width=bl_pin.width(),
height=bl_pin.height())
br_pin = inst.get_pin(inst.mod.get_br_names())
self.add_layout_pin(text=self.get_br_name() + "_{0}".format(i),
layer="m2",
layer=br_pin.layer,
offset=br_pin.ll(),
width=br_pin.width(),
height=br_pin.height())

4
compiler/tests/09_sense_amp_array_test.py
View File

@ -22,6 +22,10 @@ class sense_amp_test(openram_test):
globals.init_openram(config_file)
# check sense amp array for single port
debug.info(2, "Testing sense_amp_array for word_size=4, words_per_row=1")
a = factory.create(module_type="sense_amp_array", word_size=4, words_per_row=1)
self.local_check(a)
debug.info(2, "Testing sense_amp_array for word_size=4, words_per_row=2")
a = factory.create(module_type="sense_amp_array", word_size=4, words_per_row=2)
self.local_check(a)