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Fix precharge vdd route layer

This commit is contained in:
mrg 2020-06-02 09:23:27 -07:00
parent 9ecf98a4c3
commit b0aa70ffda
1 changed files with 2 additions and 5 deletions
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7
compiler/pgates/precharge.py
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@ -105,17 +105,14 @@ class precharge(design.design):
# center of vdd rail
pmos_vdd_pos = vector(pmos_pin.cx(), vdd_position.y)
self.add_path(self.bitline_layer, [pmos_pin.center(), pmos_vdd_pos])
self.add_path(self.en_layer, [pmos_pin.center(), pmos_vdd_pos])
self.add_via_stack_center(from_layer=self.bitline_layer,
to_layer=self.en_layer,
offset=pmos_vdd_pos)
self.add_power_pin("vdd",
self.well_contact_pos,
directions=("V", "V"))
self.add_via_stack_center(from_layer=pmos_pin.layer,
to_layer=self.bitline_layer,
to_layer=self.en_layer,
offset=pmos_pin.center(),
directions=("V", "V"))