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Add link to presentation in README
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README.md
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README.md
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@ -25,6 +25,13 @@ other views necessary to use SRAMs in ASIC design. OpenRAM supports
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integration in both commercial and open-source flows with both
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predictive and fabricable technologies.
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# Documentation
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Please take a look at our presentation We have created a detailed
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presentation that serves as our [documentation][documentation].
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This is the most up-to-date information, so please let us know if you see
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things that need to be fixed.
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# Basic Setup
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## Docker Image
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@ -197,6 +204,7 @@ Each specific technology (e.g., [FreePDK45]) should be a subdirectory
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# Further Help
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+ [Additional hints](./HINTS.md)
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+ [Documentation][documentation]
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+ [OpenRAM Slack Workspace][Slack]
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+ [OpenRAM Users Group][user-group] ([subscribe here][user-group-subscribe])
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+ [OpenRAM Developers Group][dev-group] ([subscribe here][dev-group-subscribe])
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@ -233,7 +241,7 @@ If I forgot to add you, please let me know!
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[Github pull request]: https://github.com/VLSIDA/PrivateRAM/pulls
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[Github projects]: https://github.com/VLSIDA/PrivateRAM
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[email me]: mailto:mrg+openram@ucsc.edu
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[documentation]: https://docs.google.com/presentation/d/10InGB33N51I6oBHnqpU7_w9DXlx-qe9zdrlco2Yc5co/edit?usp=sharing
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[dev-group]: mailto:openram-dev-group@ucsc.edu
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[user-group]: mailto:openram-user-group@ucsc.edu
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[dev-group-subscribe]: mailto:openram-dev-group+subscribe@ucsc.edu
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@ -7,19 +7,20 @@ import sys,os
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sys.path.append(os.path.join(sys.path[0],".."))
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import globals
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from globals import OPTS
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from sram_factory import factory
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import debug
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class ptx_test(openram_test):
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class ptx_1finger_nmos_test(openram_test):
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def runTest(self):
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globals.init_openram("config_20_{0}".format(OPTS.tech_name))
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import ptx
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import tech
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debug.info(2, "Checking min size NMOS with 1 finger")
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fet = ptx.ptx(width=tech.drc["minwidth_tx"],
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mults=1,
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tx_type="nmos")
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fet = factory.create(module_type="ptx",
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width=tech.drc["minwidth_tx"],
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mults=1,
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tx_type="nmos")
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self.local_drc_check(fet)
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globals.end_openram()
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@ -7,19 +7,20 @@ import sys,os
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sys.path.append(os.path.join(sys.path[0],".."))
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import globals
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from globals import OPTS
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from sram_factory import factory
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import debug
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class ptx_test(openram_test):
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class ptx_1finger_pmos_test(openram_test):
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def runTest(self):
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globals.init_openram("config_20_{0}".format(OPTS.tech_name))
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import ptx
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import tech
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debug.info(2, "Checking min size PMOS with 1 finger")
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fet = ptx.ptx(width=tech.drc["minwidth_tx"],
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mults=1,
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tx_type="pmos")
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fet = factory.create(module_type="ptx",
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width=tech.drc["minwidth_tx"],
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mults=1,
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tx_type="pmos")
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self.local_drc_check(fet)
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globals.end_openram()
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@ -7,21 +7,22 @@ import sys,os
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sys.path.append(os.path.join(sys.path[0],".."))
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import globals
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from globals import OPTS
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from sram_factory import factory
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import debug
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class ptx_test(openram_test):
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class ptx_3finger_nmos_test(openram_test):
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def runTest(self):
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globals.init_openram("config_20_{0}".format(OPTS.tech_name))
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import ptx
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import tech
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debug.info(2, "Checking three fingers NMOS")
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fet = ptx.ptx(width=tech.drc["minwidth_tx"],
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mults=3,
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tx_type="nmos",
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connect_active=True,
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connect_poly=True)
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fet = factory.create(module_type="ptx",
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width=tech.drc["minwidth_tx"],
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mults=3,
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tx_type="nmos",
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connect_active=True,
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connect_poly=True)
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self.local_drc_check(fet)
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globals.end_openram()
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@ -7,21 +7,22 @@ import sys,os
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sys.path.append(os.path.join(sys.path[0],".."))
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import globals
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from globals import OPTS
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from sram_factory import factory
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import debug
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class ptx_test(openram_test):
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class ptx_3finger_pmos_test(openram_test):
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def runTest(self):
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globals.init_openram("config_20_{0}".format(OPTS.tech_name))
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import ptx
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import tech
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debug.info(2, "Checking three fingers PMOS")
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fet = ptx.ptx(width=tech.drc["minwidth_tx"],
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mults=3,
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tx_type="pmos",
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connect_active=True,
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connect_poly=True)
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fet = factory.create(module_type="ptx",
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width=tech.drc["minwidth_tx"],
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mults=3,
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tx_type="pmos",
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connect_active=True,
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connect_poly=True)
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self.local_drc_check(fet)
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globals.end_openram()
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@ -7,21 +7,22 @@ import sys,os
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sys.path.append(os.path.join(sys.path[0],".."))
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import globals
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from globals import OPTS
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from sram_factory import factory
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import debug
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class ptx_test(openram_test):
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class ptx_4finger_nmos_test(openram_test):
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def runTest(self):
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globals.init_openram("config_20_{0}".format(OPTS.tech_name))
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import ptx
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import tech
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debug.info(2, "Checking three fingers NMOS")
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fet = ptx.ptx(width=tech.drc["minwidth_tx"],
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mults=4,
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tx_type="nmos",
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connect_active=True,
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connect_poly=True)
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fet = factory.create(module_type="ptx",
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width= tech.drc["minwidth_tx"],
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mults=4,
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tx_type="nmos",
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connect_active=True,
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connect_poly=True)
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self.local_drc_check(fet)
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globals.end_openram()
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@ -7,21 +7,22 @@ import sys,os
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sys.path.append(os.path.join(sys.path[0],".."))
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import globals
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from globals import OPTS
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from sram_factory import factory
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import debug
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class ptx_test(openram_test):
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def runTest(self):
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globals.init_openram("config_20_{0}".format(OPTS.tech_name))
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import ptx
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import tech
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debug.info(2, "Checking three fingers PMOS")
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fet = ptx.ptx(width=tech.drc["minwidth_tx"],
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mults=4,
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tx_type="pmos",
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connect_active=True,
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connect_poly=True)
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fet = factory.create(module_type="ptx",
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width=tech.drc["minwidth_tx"],
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mults=4,
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tx_type="pmos",
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connect_active=True,
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connect_poly=True)
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self.local_drc_check(fet)
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globals.end_openram()
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