mirror of https://github.com/VLSIDA/OpenRAM.git
Merge branch 'dev' into multiport_characterization
This commit is contained in:
commit
ac3cc5c79b
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@ -712,14 +712,17 @@ class layout(lef.lef):
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self.add_wire(layer_stack, [pin.center(), mid, trunk_mid])
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self.add_wire(layer_stack, [pin.center(), mid, trunk_mid])
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def create_channel_route(self, route_map, top_pins, bottom_pins, offset,
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def create_channel_route(self, netlist, pins, offset,
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layer_stack=("metal1", "via1", "metal2"), pitch=None,
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layer_stack=("metal1", "via1", "metal2"), pitch=None,
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vertical=False):
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vertical=False):
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"""
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"""
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This is a simple channel route for one-to-one connections that
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The net list is a list of the nets. Each net is a list of pin
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will jog the top route whenever there is a conflict. It does NOT
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names to be connected. Pins is a dictionary of the pin names
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try to minimize the number of tracks -- instead, it picks an order to avoid the vertical
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to the pin structures. Offset is the lower-left of where the
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conflicts between pins.
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routing channel will start. This does NOT try to minimize the
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number of tracks -- instead, it picks an order to avoid the
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vertical conflicts between pins.
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"""
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"""
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def remove_net_from_graph(pin, g):
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def remove_net_from_graph(pin, g):
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# Remove the pin from the keys
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# Remove the pin from the keys
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@ -758,8 +761,6 @@ class layout(lef.lef):
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if not pitch:
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if not pitch:
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pitch = self.m2_pitch
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pitch = self.m2_pitch
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# merge the two dictionaries to easily access all pins
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all_pins = {**top_pins, **bottom_pins}
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# FIXME: Must extend this to a horizontal conflict graph too if we want to minimize the
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# FIXME: Must extend this to a horizontal conflict graph too if we want to minimize the
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# number of tracks!
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# number of tracks!
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@ -771,13 +772,13 @@ class layout(lef.lef):
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# Create names for the nets for the graphs
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# Create names for the nets for the graphs
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nets = {}
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nets = {}
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index = 0
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index = 0
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#print(route_map)
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#print(netlist)
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for pin_connections in route_map:
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for pin_list in netlist:
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net_name = "n{}".format(index)
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net_name = "n{}".format(index)
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index += 1
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index += 1
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nets[net_name] = []
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nets[net_name] = []
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for pin_name in pin_connections:
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for pin_name in pin_list:
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pin = all_pins[pin_name]
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pin = pins[pin_name]
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nets[net_name].append(pin)
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nets[net_name].append(pin)
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# Find the vertical pin conflicts
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# Find the vertical pin conflicts
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@ -835,22 +836,22 @@ class layout(lef.lef):
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offset -= vector(0,pitch)
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offset -= vector(0,pitch)
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def create_vertical_channel_route(self, route_map, left_pins, right_pins, offset,
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def create_vertical_channel_route(self, netlist, pins, offset,
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layer_stack=("metal1", "via1", "metal2"),
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layer_stack=("metal1", "via1", "metal2"),
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pitch=None):
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pitch=None):
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"""
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"""
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Wrapper to create a vertical channel route
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Wrapper to create a vertical channel route
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"""
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"""
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self.create_channel_route(route_map, left_pins, right_pins, offset,
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self.create_channel_route(netlist, pins, offset, layer_stack,
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layer_stack, pitch, vertical=True)
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pitch, vertical=True)
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def create_horizontal_channel_route(self, route_map, top_pins, bottom_pins, offset,
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def create_horizontal_channel_route(self, netlist, pins, offset,
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layer_stack=("metal1", "via1", "metal2"),
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layer_stack=("metal1", "via1", "metal2"),
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pitch=None):
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pitch=None):
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"""
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"""
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Wrapper to create a horizontal channel route
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Wrapper to create a horizontal channel route
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"""
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"""
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self.create_channel_route(route_map, top_pins, bottom_pins, offset,
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self.create_channel_route(netlist, pins, offset,
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layer_stack, pitch, vertical=False)
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layer_stack, pitch, vertical=False)
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def add_enclosure(self, insts, layer="nwell"):
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def add_enclosure(self, insts, layer="nwell"):
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@ -319,8 +319,10 @@ class sram_1bank(sram_base):
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route_map = list(zip(bank_names, dff_names))
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route_map = list(zip(bank_names, dff_names))
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dff_pins = {key: self.data_dff_inst.get_pin(key) for key in dff_names }
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dff_pins = {key: self.data_dff_inst.get_pin(key) for key in dff_names }
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bank_pins = {key: self.bank_inst.get_pin(key) for key in bank_names }
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bank_pins = {key: self.bank_inst.get_pin(key) for key in bank_names }
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self.create_horizontal_channel_route(route_map, dff_pins, bank_pins, offset)
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# Combine the dff and bank pins into a single dictionary of pin name to pin.
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all_pins = {**dff_pins, **bank_pins}
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self.create_horizontal_channel_route(route_map, all_pins, offset)
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