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Ptx is in microns if lvs_lib exists

This commit is contained in:
mrg 2020-04-03 14:06:56 -07:00
parent f358de78bb
commit ab5dd47182
2 changed files with 14 additions and 5 deletions
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7
compiler/base/hierarchy_spice.py
View File

@ -299,11 +299,14 @@ class spice():
# these are wires and paths
if self.conns[i] == []:
continue
if hasattr(self.insts[i].mod, "spice_device"):
if lvs_netlist and hasattr(self.insts[i].mod, "lvs_device"):
sp.write(self.insts[i].mod.lvs_device.format(self.insts[i].name,
" ".join(self.conns[i])))
sp.write("\n")
elif hasattr(self.insts[i].mod, "spice_device"):
sp.write(self.insts[i].mod.spice_device.format(self.insts[i].name,
" ".join(self.conns[i])))
sp.write("\n")
else:
sp.write("X{0} {1} {2}\n".format(self.insts[i].name,
" ".join(self.conns[i]),

12
compiler/pgates/ptx.py
View File

@ -11,6 +11,8 @@ from tech import layer, drc, spice
from vector import vector
from sram_factory import factory
import contact
import os
from globals import OPTS
class ptx(design.design):
@ -100,8 +102,6 @@ class ptx(design.design):
dir_list = ['INOUT', 'INPUT', 'INOUT', body_dir]
self.add_pin_list(pin_list, dir_list)
# self.spice.append("\n.SUBCKT {0} {1}".format(self.name,
# " ".join(self.pins)))
# Just make a guess since these will actually
# be decided in the layout later.
area_sd = 2.5 * self.poly_width * self.tx_width
@ -114,7 +114,13 @@ class ptx(design.design):
area_sd)
self.spice_device = main_str + area_str
self.spice.append("\n* ptx " + self.spice_device)
# self.spice.append(".ENDS {0}".format(self.name))
if os.path.exists(OPTS.openram_tech + "lvs_lib"):
self.lvs_device = "M{{0}} {{1}} {0} m={1} w={2} l={3} ".format(spice[self.tx_type],
self.mults,
self.tx_width,
drc("minwidth_poly"))
def setup_layout_constants(self):
"""