Merge in mtgrime's fix.

2026-08-22 06:07:31 +02:00 · 2018-06-29 12:44:26 -07:00
parent ac7aa4537c 82eeb297dd
commit a9849eff3a
1 changed files with 1 additions and 0 deletions
@@ -69,6 +69,7 @@ class pbitcell_test(openram_test):

        OPTS.check_lvsdrc = True
        globals.end_openram()
+        OPTS.bitcell = "bitcell"


 # instantiate a copy of the class to actually run the test