mirror of https://github.com/VLSIDA/OpenRAM.git
Change track spacing for freepdk45
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@ -939,7 +939,7 @@ class router(router_tech):
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self.new_pins[name] = pg.pins
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def add_ring_supply_pin(self, name, width=3, space=2):
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def add_ring_supply_pin(self, name, width=3, space=3):
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"""
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Adds a ring supply pin that goes outside the given bbox.
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"""
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