Revert to channel route of bitlines

This commit is contained in:
mrg 2020-06-02 10:08:53 -07:00
parent 620604603c
commit a1c7474f80
1 changed files with 13 additions and 12 deletions

View File

@ -536,11 +536,11 @@ class port_data(design.design):
# This could be a channel route, but in some techs the bitlines # This could be a channel route, but in some techs the bitlines
# are too close together. # are too close together.
self.connect_bitlines(inst1=inst1, self.channel_route_bitlines(inst1=inst1,
inst1_bls_template=inst1_bls_templ, inst1_bls_template=inst1_bls_templ,
inst2=inst2, inst2=inst2,
num_bits=self.word_size, num_bits=self.word_size,
inst1_start_bit=start_bit) inst1_start_bit=start_bit)
def route_write_driver_to_column_mux_or_precharge_array(self, port): def route_write_driver_to_column_mux_or_precharge_array(self, port):
""" Routing of BL and BR between sense_amp and column mux or precharge array """ """ Routing of BL and BR between sense_amp and column mux or precharge array """
@ -562,10 +562,10 @@ class port_data(design.design):
# This could be a channel route, but in some techs the bitlines # This could be a channel route, but in some techs the bitlines
# are too close together. # are too close together.
self.connect_bitlines(inst1=inst1, inst2=inst2, self.channel_route_bitlines(inst1=inst1, inst2=inst2,
num_bits=self.word_size, num_bits=self.word_size,
inst1_bls_template=inst1_bls_templ, inst1_bls_template=inst1_bls_templ,
inst1_start_bit=start_bit) inst1_start_bit=start_bit)
def route_write_driver_to_sense_amp(self, port): def route_write_driver_to_sense_amp(self, port):
""" Routing of BL and BR between write driver and sense amp """ """ Routing of BL and BR between write driver and sense amp """
@ -715,8 +715,9 @@ class port_data(design.design):
bot_bl, bot_br = bot_bl_pin.uc(), bot_br_pin.uc() bot_bl, bot_br = bot_bl_pin.uc(), bot_br_pin.uc()
top_bl, top_br = top_bl_pin.bc(), top_br_pin.bc() top_bl, top_br = top_bl_pin.bc(), top_br_pin.bc()
self.add_zjog(bot_bl_pin.layer, bot_bl, top_bl, "V") layer_pitch = getattr(self, "{}_pitch".format(top_bl_pin.layer))
self.add_zjog(bot_br_pin.layer, bot_br, top_br, "V") self.add_zjog(bot_bl_pin.layer, bot_bl, top_bl, "V", top_bl_pin.by() - layer_pitch)
self.add_zjog(bot_br_pin.layer, bot_br, top_br, "V", top_bl_pin.by() - 2 * layer_pitch)
def graph_exclude_precharge(self): def graph_exclude_precharge(self):
"""Precharge adds a loop between bitlines, can be excluded to reduce complexity""" """Precharge adds a loop between bitlines, can be excluded to reduce complexity"""