luke/OpenRAM
1
0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 09:30:38 +02:00
Code Issues Packages Projects Releases Wiki Activity

Conditionally path exclude

Browse Source
This commit is contained in:
Matt Guthaus
2019-07-27 12:14:00 -07:00
parent 8e43469486
commit 98878a0a27
1 changed files with 2 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files
compiler/modules/control_logic.py
+2 -1
View File
@@ -964,4 +964,5 @@ class control_logic(design.design):
"""Exclude dffs from graph as they do not represent critical path"""
self.graph_inst_exclude.add(self.ctrl_dff_inst)
self.graph_inst_exclude.add(self.w_en_gate_inst)
if self.port_type=="rw" or self.port_type=="w":
self.graph_inst_exclude.add(self.w_en_gate_inst)