mirror of https://github.com/VLSIDA/OpenRAM.git
Flip MSB and LSB in lib file due to bug report
This commit is contained in:
mrg
parent
cce1305da3
commit
9694237dba
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@ -31,7 +31,7 @@ class lib:
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self.gnd_name = spice["ground"]
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except KeyError:
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self.gnd_name = "gnd"
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self.out_dir = out_dir
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self.sram = sram
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self.sp_file = sp_file
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@ -60,7 +60,7 @@ class lib:
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self.load_scales = np.array(OPTS.load_scales)
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self.load = tech.spice["dff_in_cap"]
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self.loads = self.load_scales * self.load
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self.slew_scales = np.array(OPTS.slew_scales)
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self.slew = tech.spice["rise_time"]
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@ -79,7 +79,7 @@ class lib:
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self.slews.append(slew)
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self.loads = np.array(self.loads)
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self.slews = np.array(self.slews)
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debug.info(1, "Slews: {0}".format(self.slews))
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debug.info(1, "Slews: {0}".format(self.slews))
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debug.info(1, "Loads: {0}".format(self.loads))
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debug.info(1, "self.load_slews : {0}".format(self.load_slews))
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def create_corners(self):
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@ -102,7 +102,7 @@ class lib:
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self.corners = []
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self.lib_files = []
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if OPTS.use_specified_corners == None:
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# Nominal corner
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corner_tuples = set()
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@ -114,7 +114,7 @@ class lib:
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for v in self.supply_voltages:
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for t in self.temperatures:
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corner_tuples.add((p, v, t))
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else:
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else:
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nom_corner = (nom_process, nom_supply, nom_temperature)
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corner_tuples.add(nom_corner)
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if not OPTS.nominal_corner_only:
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@ -132,7 +132,7 @@ class lib:
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corner_tuples.remove(nom_corner)
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else:
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corner_tuples = OPTS.use_specified_corners
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for corner_tuple in corner_tuples:
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self.add_corner(*corner_tuple)
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@ -366,16 +366,16 @@ class lib:
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self.lib.write(" base_type : array;\n")
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self.lib.write(" data_type : bit;\n")
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self.lib.write(" bit_width : {0};\n".format(self.sram.word_size))
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self.lib.write(" bit_from : 0;\n")
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self.lib.write(" bit_to : {0};\n".format(self.sram.word_size - 1))
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self.lib.write(" bit_from : {0};\n".format(self.sram.word_size - 1))
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self.lib.write(" bit_to : 0;\n")
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self.lib.write(" }\n\n")
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self.lib.write(" type (addr){\n")
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self.lib.write(" base_type : array;\n")
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self.lib.write(" data_type : bit;\n")
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self.lib.write(" bit_width : {0};\n".format(self.sram.addr_size))
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self.lib.write(" bit_from : 0;\n")
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self.lib.write(" bit_to : {0};\n".format(self.sram.addr_size - 1))
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self.lib.write(" bit_from : {0};\n".format(self.sram.addr_size - 1))
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self.lib.write(" bit_to : 0;\n")
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self.lib.write(" }\n\n")
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if self.sram.write_size:
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@ -383,8 +383,8 @@ class lib:
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self.lib.write(" base_type : array;\n")
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self.lib.write(" data_type : bit;\n")
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self.lib.write(" bit_width : {0};\n".format(self.sram.num_wmasks))
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self.lib.write(" bit_from : 0;\n")
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self.lib.write(" bit_to : {0};\n".format(self.sram.num_wmasks - 1))
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self.lib.write(" bit_from : {0};\n".format(self.sram.num_wmasks - 1))
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self.lib.write(" bit_to : 0;\n")
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self.lib.write(" }\n\n")
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@ -650,21 +650,21 @@ class lib:
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probe_address = "0" + "1" * (self.sram.addr_size - 1)
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probe_data = self.sram.word_size - 1
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char_results = self.d.analyze(probe_address, probe_data, self.load_slews)
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self.char_sram_results, self.char_port_results = char_results
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if 'sim_time' in self.char_sram_results:
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self.pred_time = self.char_sram_results['sim_time']
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# Add to the OPTS to be written out as part of the extended OPTS file
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# FIXME: Temporarily removed from characterization output
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# FIXME: Temporarily removed from characterization output
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# if not self.use_model:
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# OPTS.sen_path_delays = self.char_sram_results["sen_path_measures"]
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# OPTS.sen_path_names = self.char_sram_results["sen_path_names"]
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# OPTS.bl_path_delays = self.char_sram_results["bl_path_measures"]
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# OPTS.bl_path_names = self.char_sram_results["bl_path_names"]
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def compute_setup_hold(self):
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""" Do the analysis if we haven't characterized a FF yet """
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# Do the analysis if we haven't characterized a FF yet
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@ -687,23 +687,23 @@ class lib:
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datasheet = open(datasheet_path +'/datasheet.info', 'w')
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else:
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datasheet = open(datasheet_path +'/datasheet.info', 'a+')
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self.write_inp_params_datasheet(datasheet, corner, lib_name)
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self.write_signal_from_ports(datasheet,
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"din{1}[{0}:0]".format(self.sram.word_size - 1, '{}'),
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self.write_ports,
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"din{1}[{0}:0]".format(self.sram.word_size - 1, '{}'),
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self.write_ports,
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"setup_times_LH",
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"setup_times_HL",
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"setup_times_HL",
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"hold_times_LH",
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"hold_times_HL")
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# self.write_signal_from_ports(datasheet,
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# "dout{1}[{0}:0]".format(self.sram.word_size - 1, '{}'),
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# self.read_ports,
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# "dout{1}[{0}:0]".format(self.sram.word_size - 1, '{}'),
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# self.read_ports,
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# "delay_lh",
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# "delay_hl",
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# "delay_hl",
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# "slew_lh",
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# "slew_hl")
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# "slew_hl")
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for port in self.all_ports:
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#dout timing
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if port in self.read_ports:
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@ -720,41 +720,41 @@ class lib:
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min(list(map(round_time,self.char_port_results[port]["slew_hl"]))),
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max(list(map(round_time,self.char_port_results[port]["slew_hl"])))
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))
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))
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self.write_signal_from_ports(datasheet,
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"csb{}",
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self.all_ports,
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"csb{}",
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self.all_ports,
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"setup_times_LH",
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"setup_times_HL",
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"setup_times_HL",
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"hold_times_LH",
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"hold_times_HL")
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self.write_signal_from_ports(datasheet,
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"addr{1}[{0}:0]".format(self.sram.addr_size - 1, '{}'),
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self.all_ports,
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"setup_times_LH",
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"setup_times_HL",
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"hold_times_LH",
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"hold_times_HL")
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self.write_signal_from_ports(datasheet,
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"web{}",
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self.readwrite_ports,
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"addr{1}[{0}:0]".format(self.sram.addr_size - 1, '{}'),
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self.all_ports,
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"setup_times_LH",
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"setup_times_HL",
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"setup_times_HL",
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"hold_times_LH",
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"hold_times_HL")
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"hold_times_HL")
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self.write_signal_from_ports(datasheet,
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"web{}",
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self.readwrite_ports,
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"setup_times_LH",
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"setup_times_HL",
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"hold_times_LH",
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"hold_times_HL")
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self.write_power_datasheet(datasheet)
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self.write_model_params(datasheet, time)
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datasheet.write("END\n")
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datasheet.close()
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def write_inp_params_datasheet(self, datasheet, corner, lib_name):
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if OPTS.is_unit_test:
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git_id = 'FFFFFFFFFFFFFFFFFFFF'
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@ -774,7 +774,7 @@ class lib:
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debug.warning("Failed to retrieve git id")
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git_id = 'Failed to retrieve'
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current_time = datetime.date.today()
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# write static information to be parser later
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datasheet.write("{0},{1},{2},{3},{4},{5},{6},{7},{8},{9},{10},{11},{12},{13},{14},{15},{16},".format(
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OPTS.output_name,
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@ -802,8 +802,8 @@ class lib:
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# write area
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datasheet.write(str(self.sram.width * self.sram.height) + ',')
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def write_signal_from_ports(self, datasheet, signal, ports, time_pos_1, time_pos_2, time_pos_3, time_pos_4):
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def write_signal_from_ports(self, datasheet, signal, ports, time_pos_1, time_pos_2, time_pos_3, time_pos_4):
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for port in ports:
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datasheet.write("{0},{1},{2},{3},{4},{5},{6},{7},{8},".format(
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signal.format(port),
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@ -820,8 +820,8 @@ class lib:
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max(list(map(round_time,self.times[time_pos_4])))
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))
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def write_power_datasheet(self, datasheet):
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def write_power_datasheet(self, datasheet):
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# write power information
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for port in self.all_ports:
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name = ''
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@ -860,34 +860,30 @@ class lib:
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control_str += ' & csb{0}'.format(i)
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datasheet.write("{0},{1},{2},".format('leak', control_str, self.char_sram_results["leakage_power"]))
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def write_model_params(self, datasheet, time):
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"""Write values which will be used in the analytical model as inputs"""
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datasheet.write("{0},{1},".format('sim_time', time))
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datasheet.write("{0},{1},".format('words_per_row', OPTS.words_per_row))
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datasheet.write("{0},{1},".format('slews', list(self.slews)))
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datasheet.write("{0},{1},".format('loads', list(self.loads)))
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for port in self.read_ports:
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datasheet.write("{0},{1},".format('cell_rise_{}'.format(port), self.char_port_results[port]["delay_lh"]))
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datasheet.write("{0},{1},".format('cell_fall_{}'.format(port), self.char_port_results[port]["delay_hl"]))
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datasheet.write("{0},{1},".format('rise_transition_{}'.format(port), self.char_port_results[port]["slew_lh"]))
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datasheet.write("{0},{1},".format('fall_transition_{}'.format(port), self.char_port_results[port]["slew_hl"]))
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for port in self.write_ports:
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write1_power = np.mean(self.char_port_results[port]["write1_power"])
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write0_power = np.mean(self.char_port_results[port]["write0_power"])
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datasheet.write("{0},{1},".format('write_rise_power_{}'.format(port), write1_power))
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#FIXME: should be write_fall_power
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datasheet.write("{0},{1},".format('write_fall_power_{}'.format(port), write0_power))
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for port in self.read_ports:
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read1_power = np.mean(self.char_port_results[port]["read1_power"])
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read0_power = np.mean(self.char_port_results[port]["read0_power"])
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datasheet.write("{0},{1},".format('read_rise_power_{}'.format(port), read1_power))
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#FIXME: should be read_fall_power
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datasheet.write("{0},{1},".format('read_fall_power_{}'.format(port), read0_power))
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