mirror of https://github.com/VLSIDA/OpenRAM.git
Change to callable DRC rule. Use bottom coordinate for bus offsets.
This commit is contained in:
mrg
parent
e95c97d7a5
commit
94eb2afa36
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@ -46,7 +46,6 @@ class layout():
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except ImportError:
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self.pwr_grid_layer = "m3"
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############################################################
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# GDS layout
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############################################################
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@ -196,7 +195,7 @@ class layout():
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self.insts.append(geometry.instance(name, mod, offset, mirror, rotate))
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debug.info(3, "adding instance {}".format(self.insts[-1]))
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# This is commented out for runtime reasons
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#debug.info(4, "instance list: " + ",".join(x.name for x in self.insts))
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# debug.info(4, "instance list: " + ",".join(x.name for x in self.insts))
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return self.insts[-1]
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def get_inst(self, name):
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@ -214,12 +213,14 @@ class layout():
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width = drc["minwidth_{}".format(layer)]
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if not height:
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height = drc["minwidth_{}".format(layer)]
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# negative layers indicate "unused" layers in a given technology
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lpp = techlayer[layer]
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if lpp[0] >= 0:
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self.objs.append(geometry.rectangle(lpp, offset, width, height))
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return self.objs[-1]
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return None
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if abs(offset[0]-5.16250)<0.01 and abs(offset[1]-8.70750)<0.01:
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import pdb; pdb.set_trace()
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self.objs.append(geometry.rectangle(lpp,
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offset,
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width,
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height))
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return self.objs[-1]
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def add_rect_center(self, layer, offset, width=None, height=None):
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"""
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@ -230,16 +231,13 @@ class layout():
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width = drc["minwidth_{}".format(layer)]
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if not height:
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height = drc["minwidth_{}".format(layer)]
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# negative layers indicate "unused" layers in a given technology
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lpp = techlayer[layer]
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corrected_offset = offset - vector(0.5 * width, 0.5 * height)
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if lpp[0] >= 0:
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self.objs.append(geometry.rectangle(lpp,
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corrected_offset,
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width,
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height))
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return self.objs[-1]
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return None
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self.objs.append(geometry.rectangle(lpp,
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corrected_offset,
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width,
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height))
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return self.objs[-1]
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def add_segment_center(self, layer, start, end):
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"""
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@ -252,15 +250,15 @@ class layout():
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elif start.x != end.x:
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offset = vector(0, 0.5 * minwidth_layer)
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return self.add_rect(layer,
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start-offset,
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end.x-start.x,
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start - offset,
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end.x - start.x,
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minwidth_layer)
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else:
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offset = vector(0.5 * minwidth_layer, 0)
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return self.add_rect(layer,
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start-offset,
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start - offset,
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minwidth_layer,
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end.y-start.y)
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end.y - start.y)
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def get_pin(self, text):
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"""
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@ -268,14 +266,14 @@ class layout():
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"""
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try:
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if len(self.pin_map[text]) > 1:
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debug.error("Should use a pin iterator since more than one pin {}".format(text),-1)
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debug.error("Should use a pin iterator since more than one pin {}".format(text), -1)
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# If we have one pin, return it and not the list.
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# Otherwise, should use get_pins()
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any_pin = next(iter(self.pin_map[text]))
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return any_pin
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except Exception:
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self.gds_write("missing_pin.gds")
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debug.error("No pin found with name {0} on {1}. Saved as missing_pin.gds.".format(text,self.name),-1)
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debug.error("No pin found with name {0} on {1}. Saved as missing_pin.gds.".format(text, self.name), -1)
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def get_pins(self, text):
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"""
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@ -377,7 +375,7 @@ class layout():
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height = drc["minwidth_{0}".format(layer)]
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new_pin = pin_layout(text,
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[offset, offset+vector(width, height)],
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[offset, offset + vector(width, height)],
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layer)
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try:
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@ -413,23 +411,18 @@ class layout():
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def add_label(self, text, layer, offset=[0, 0], zoom=-1):
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"""Adds a text label on the given layer,offset, and zoom level"""
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# negative layers indicate "unused" layers in a given technology
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debug.info(5, "add label " + str(text) + " " + layer + " " + str(offset))
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lpp = techlayer[layer]
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if lpp[0] >= 0:
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self.objs.append(geometry.label(text, lpp, offset, zoom))
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return self.objs[-1]
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return None
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self.objs.append(geometry.label(text, lpp, offset, zoom))
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return self.objs[-1]
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def add_path(self, layer, coordinates, width=None):
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"""Connects a routing path on given layer,coordinates,width."""
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debug.info(4, "add path " + str(layer) + " " + str(coordinates))
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import wire_path
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# NOTE: (UNTESTED) add_path(...) is currently not used
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# negative layers indicate "unused" layers in a given technology
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# lpp = techlayer[layer]
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# if lpp[0] >= 0:
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# self.objs.append(geometry.path(lpp, coordinates, width))
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# self.objs.append(geometry.path(lpp, coordinates, width))
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wire_path.wire_path(obj=self,
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layer=layer,
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@ -465,7 +458,7 @@ class layout():
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from tech import preferred_directions
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return preferred_directions[layer]
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def add_via(self, layers, offset, size=[1,1], directions=None, implant_type=None, well_type=None):
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def add_via(self, layers, offset, size=[1, 1], directions=None, implant_type=None, well_type=None):
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""" Add a three layer via structure. """
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if not directions:
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@ -487,7 +480,7 @@ class layout():
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self.connect_inst([])
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return inst
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def add_via_center(self, layers, offset, directions=None, size=[1,1], implant_type=None, well_type=None):
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def add_via_center(self, layers, offset, directions=None, size=[1, 1], implant_type=None, well_type=None):
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"""
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Add a three layer via structure by the center coordinate
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accounting for mirroring and rotation.
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@ -799,9 +792,7 @@ class layout():
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self.add_rect(layer=layer,
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offset=line_offset,
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height=length)
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# Make this the center of the rail
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line_positions[names[i]] = line_offset + vector(half_minwidth,
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0.5 * length)
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line_positions[names[i]] = line_offset + vector(half_minwidth, 0)
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else:
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for i in range(len(names)):
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line_offset = offset + vector(0,
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@ -953,14 +944,14 @@ class layout():
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min_y = min([pin.center().y for pin in pins])
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# if we are less than a pitch, just create a non-preferred layer jog
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if max_y-min_y <= pitch:
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if max_y - min_y <= pitch:
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half_layer_width = 0.5 * drc["minwidth_{0}".format(self.horizontal_layer)]
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# Add the vertical trunk on the horizontal layer!
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self.add_path(self.horizontal_layer,
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[vector(trunk_offset.x, min_y - half_layer_width),
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vector(trunk_offset.x,max_y + half_layer_width)])
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vector(trunk_offset.x, max_y + half_layer_width)])
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# Route each pin to the trunk
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for pin in pins:
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@ -1000,7 +991,7 @@ class layout():
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# Remove the pin from all conflicts
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# FIXME: This is O(n^2), so maybe optimize it.
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for other_pin,conflicts in g.items():
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for other_pin, conflicts in g.items():
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if pin in conflicts:
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conflicts.remove(pin)
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g[other_pin]=conflicts
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@ -1151,8 +1142,8 @@ class layout():
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else:
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self.bounding_box = self.add_rect(layer=boundary_layer,
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offset=ll,
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height=ur.y-ll.y,
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width=ur.x-ll.x)
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height=ur.y - ll.y,
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width=ur.x - ll.x)
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def add_enclosure(self, insts, layer="nwell"):
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""" Add a layer that surrounds the given instances. Useful
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@ -1171,8 +1162,8 @@ class layout():
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self.add_rect(layer=layer,
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offset=vector(xmin, ymin),
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width=xmax-xmin,
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height=ymax-ymin)
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width=xmax - xmin,
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height=ymax - ymin)
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def copy_power_pins(self, inst, name):
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"""
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@ -1192,7 +1183,7 @@ class layout():
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else:
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debug.warning("{0} pins of {1} should be on {2} or metal1 for "\
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"supply router."
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.format(name,inst.name,self.pwr_grid_layer))
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.format(name, inst.name, self.pwr_grid_layer))
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def add_power_pin(self, name, loc, size=[1, 1], vertical=False, start_layer="m1"):
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"""
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@ -1244,8 +1235,8 @@ class layout():
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[ll, ur] = bbox
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supply_rail_spacing = self.supply_rail_pitch - self.supply_rail_width
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height = (ur.y-ll.y) + 3 * self.supply_rail_pitch - supply_rail_spacing
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width = (ur.x-ll.x) + 3 * self.supply_rail_pitch - supply_rail_spacing
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height = (ur.y - ll.y) + 3 * self.supply_rail_pitch - supply_rail_spacing
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width = (ur.x - ll.x) + 3 * self.supply_rail_pitch - supply_rail_spacing
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# LEFT vertical rails
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offset = ll + vector(-2 * self.supply_rail_pitch,
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@ -74,8 +74,8 @@ class wire(wire_path):
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contact1 = getattr(contact, layer1 + "_via")
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max_contact = max(contact1.width, contact1.height)
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layer1_space = drc["{0}_to_{0}".format(layer1)]
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layer2_space = drc["{0}_to_{0}".format(layer2)]
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layer1_space = drc("{0}_to_{0}".format(layer1))
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layer2_space = drc("{0}_to_{0}".format(layer2))
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pitch = max_contact + max(layer1_space, layer2_space)
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return pitch
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