Get vdd/gnd from properties if it is defined.

This commit is contained in:
mrg
2020-11-16 10:14:37 -08:00
parent 7512aa6e70
commit 93e94e26ec
5 changed files with 10 additions and 6 deletions
-2
View File
@@ -40,8 +40,6 @@ class hierarchy_design(hierarchy_spice.spice, hierarchy_layout.layout):
self.drc_errors = "skipped"
self.lvs_errors = "skipped"
self.name = name
self.cell_name = cell_name
hierarchy_spice.spice.__init__(self, name, cell_name)
hierarchy_layout.layout.__init__(self, name, cell_name)
self.init_graph_params()
+3
View File
@@ -32,8 +32,10 @@ class layout():
"""
def __init__(self, name, cell_name):
# This gets set in both spice and layout so either can be called first.
self.name = name
self.cell_name = cell_name
self.width = None
self.height = None
self.bounding_box = None
@@ -43,6 +45,7 @@ class layout():
self.pin_map = {} # Holds name->pin_layout map for all pins
self.visited = [] # List of modules we have already visited
self.is_library_cell = False # Flag for library cells
self.gds_read()
try:
+1 -1
View File
@@ -28,6 +28,7 @@ class spice():
"""
def __init__(self, name, cell_name):
# This gets set in both spice and layout so either can be called first.
self.name = name
self.cell_name = cell_name
@@ -78,7 +79,6 @@ class spice():
""" Adds a pin_list to the pins list """
# The type list can be a single type for all pins
# or a list that is the same length as the pin list.
if type(pin_type)==str:
for pin in pin_list:
debug.check(pin_type in self.valid_signal_types,