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Fix typo and syntax error.

This commit is contained in:
mrg 2020-04-02 10:37:21 -07:00
parent 5349323acd
commit 9106e22b58
1 changed files with 1 additions and 1 deletions
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2
compiler/sram/sram_base.py
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@ -121,7 +121,7 @@ class sram_base(design, verilog, lef):
start_time = datetime.datetime.now()
# We only enable final verification if we have routed the design
self.DRC_LVS(final_verification=OPTS.route_supplies, roce_check=True)
self.DRC_LVS(final_verification=OPTS.route_supplies, force_check=True)
if not OPTS.is_unit_test:
print_time("Verification", datetime.datetime.now(), start_time)