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PEP8 cleanup

This commit is contained in:
mrg 2021-09-07 16:49:44 -07:00
parent 03f87cd681
commit 8d9a4cc27b
3 changed files with 3 additions and 5 deletions
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3
compiler/base/vector.py
View File

@ -5,10 +5,11 @@
# (acting for and on behalf of Oklahoma State University) # (acting for and on behalf of Oklahoma State University)
# All rights reserved. # All rights reserved.
# #
import debug
import math import math
import tech import tech
class vector(): class vector():
""" """
This is the vector class to represent the coordinate This is the vector class to represent the coordinate

4
compiler/modules/bank.py
View File

@ -369,11 +369,9 @@ class bank(design.design):
3 * self.m2_pitch, 3 * self.m2_pitch,
drc("nwell_to_nwell")) drc("nwell_to_nwell"))
def add_modules(self): def add_modules(self):
""" Add all the modules using the class loader """ """ Add all the modules using the class loader """
local_array_size = OPTS.local_array_size local_array_size = OPTS.local_array_size
if local_array_size > 0: if local_array_size > 0:
@ -705,7 +703,7 @@ class bank(design.design):
pitch=self.m3_pitch) pitch=self.m3_pitch)
self.copy_layout_pin(self.port_address_inst[0], "wl_en", self.prefix + "wl_en0") self.copy_layout_pin(self.port_address_inst[0], "wl_en", self.prefix + "wl_en0")
# Port 1 # Port 1
if len(self.all_ports)==2: if len(self.all_ports)==2:
# The other control bus is routed up to two pitches above the bitcell array # The other control bus is routed up to two pitches above the bitcell array

1
compiler/modules/local_bitcell_array.py
View File

@ -302,4 +302,3 @@ class local_bitcell_array(bitcell_base_array.bitcell_base_array):
Clears the bit exclusions Clears the bit exclusions
""" """
self.bitcell_array.clear_exclude_bits() self.bitcell_array.clear_exclude_bits()