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Supply router working except:

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Off grid pins. Some pins do now span enough of the routing track and must be patched.
  Route track width. Instead of minimum width route, it should be the track width.
This commit is contained in:
Matt Guthaus
2018-09-18 12:57:39 -07:00
parent bfc8428df7
commit 8d2804b9cb
14 changed files with 265 additions and 164 deletions
Download Patch File Download Diff File Expand all files Collapse all files
technology/scn4m_subm/tf/display.drf
+2 -1
View File
@@ -546,7 +546,7 @@ drDefinePacket(
( display background stipple1 lineStyle0 black black outlineStipple)
( display y9 stipple0 solid silver silver solid )
( display Metal3Net dots4 solid navy navy outlineStipple)
( display Metal3Net dots4 solid tan tan outlineStipple)
( display Metal4Net dots4 solid tan tan outlineStipple)
( display A1 stipple0 lineStyle0 winBack winBack solid )
( display pin solid lineStyle0 red red solid )
( display XPNet blank solid yellow yellow outline )
@@ -640,6 +640,7 @@ drDefinePacket(
( display Canplace blank solid cyan cyan outline )
( display annotate7 stipple0 solid red red solid )
( display Via2 solid solid navy navy solid )
( display Via3 solid solid tan tan solid )
( display Metal2Pin stipple0 lineStyle0 magenta magenta solid )
( display annotate4 stipple0 solid yellow yellow solid )
( display device1 stipple1 lineStyle0 green green outlineStipple)
technology/scn4m_subm/tf/glade_scn4me_subm.py → technology/scn4m_subm/tf/glade_scn4m_subm.py
+1 -1
View File
@@ -1,5 +1,5 @@
import os
CWD = os.environ.get("OPENRAM_TECH") + "/scn3me_subm/tf"
CWD = os.environ.get("OPENRAM_TECH") + "/scn4m_subm/tf"
ui().importCds("default", CWD+"/display.drf", CWD+"/mosis.tf", 1000, 1, CWD+"/layers.map")
technology/scn4m_subm/tf/mosis.tf
+9
View File
@@ -147,6 +147,8 @@ layerDefinitions(
( Metal2 drawing )
( Via2 drawing )
( Metal3 drawing )
( Via3 drawing )
( Metal4 drawing )
( annotate drawing )
( annotate drawing1 )
( annotate drawing2 )
@@ -161,6 +163,7 @@ layerDefinitions(
( Metal1 pin )
( Metal2 pin )
( Metal3 pin )
( Metal4 pin )
( Glass drawing )
( XP drawing )
( prBoundary drawing )
@@ -203,6 +206,8 @@ layerDefinitions(
( Via net )
( Metal3 net )
( Via2 net )
( Metal4 net )
( Via3 net )
( pin label )
( text drawing )
( pin drawing )
@@ -313,11 +318,14 @@ layerDefinitions(
( annotate drawing9 annotate9 t t nil t nil )
( Via2 drawing Via2 t t t t t )
( Metal3 drawing Metal3 t t t t t )
( Via3 drawing Via3 t t t t t )
( Metal4 drawing Metal4 t t t t t )
( Glass drawing Glass t t t nil t )
( XP drawing XP t t t nil t )
( Metal1 pin Metal1Pin t t t nil t )
( Metal2 pin Metal2Pin t t t nil t )
( Metal3 pin Metal3Pin t t t nil t )
( Metal4 pin Metal4Pin t t t nil t )
( Poly1 pin Poly1Pin t t t nil t )
( prBoundary drawing prBoundary t t nil t nil )
( prBoundary boundary prBoundaryBnd t t nil t nil )
@@ -356,6 +364,7 @@ layerDefinitions(
( device annotate deviceAnt t t t t nil )
( Metal2 net Metal2Net t t t nil nil )
( Metal3 net Metal3Net t t t nil nil )
( Metal4 net Metal4Net t t t nil nil )
( device label deviceLbl t t t t nil )
( Via net ViaNet t t t nil nil )
( Via2 net Via2Net t t t nil nil )